3M DELTA Series - Page 37

Clock reference frequencies are determined by
user-programmable dividers located on the Play
Logic board. The output reference square wave
frequency is divided down from the microprocessor
master clock via the ALE line from the processor
(1/ 15th the clock master frequency), U213and U216,
a pair of dividers. The output of U216, pins 3 and 12,
is a square wave which serves as the motor clock
reference, and drives U215. a phase comparator.
Simultaneously, the motor-mounted tachometer
outputs an analog signal to U301C, a high gain
squaring
circuit and low pass filter. This signal is fed
to the base of Q30L which forms an open collector
type driver that outputs a square wave pulse train
back to pin 1 of U2 15 on the play logic board.
U215 pin 9 receives the clock reference pulse
train, while pin 1 receives the pulse train from the
motor tachometer circuit. U215 is a dual one-shot
which outputs an approximate 5 micro-second pulse
on each output (pin 5 for the reference oscillator,
and pin 13 for the motor tachometer). U215 is active
high, and outputs pulses to U2 14, a bi-directional 4
bit shift register. Tach pulses from U215 pin 13 shifts a
high from Q a to Q b , Q b to Qa Qc to Qc- Reference
clock pulses from U2 15 pin 5 shifts a low to Qp, Q d to
Qc- Qc to Q b , Q b to Q a - This action produces an out 
put from U214 that represents an "error" signal rep 
resenting the difference between the reference fre 
quency and the tachometer frequency. This output,
pin 2 and 12 of U2 14 is low when the reference fre 
quency is greater than the tach frequency. It is high
when the tach frequency is greater than the refer 
ence frequency. When the motor (tachometer) is
running at the correct speed, U214 pins 2 and 12
output a square wave pulse train equal in frequency
to the reference frequency and at an approximate
70% duty cycle. This pulse is equal to the phase dif 
ference between the reference pulses and the tach 
ometer pulses. This signal is outputted to the microp 
rocessor for monitoring the motor condition and also
outputted back to the motor control card for further
conditioning.
Duty cycle pulses from the Play Logic board are
routed to U301A on the motor control board, which
is configured as a low pass filter (LPF). The output of
the LPF is a DC voltage that is proportional to the
motor's Duty Cycle.
In a similar manner, tachometer square waves
from the output of U301C are filtered heavily and
routed via R315 to the inverting input of U301D. DC
from the LPF is routed to the noninverting input of
U301D where the two signals are combined. U301D
performs multiple functions, but primarily functions
as a summing amplifier for DC levels from the tacho 
meter and duty cycle circuits. The outputs of U301D
is a DC level that is the sum of the input voltages. It is
used to set the nominal operating current of the
motor stator drivers Q302, Q303, and Q304. R327
provides motor current sense feedback via the emit 
ters of commutation transistors Q306, Q308, and
Q310. This allows U301D to monitor activity in the
motor windings and limit current, remove high fre 
quency switching transients, and provide smoother
commutation. The emitter of Q306, Q308, and Q310
are located .1 ohms above ground by R328. This
allows accurate current flow monitoring via R327
back to U301D, and serves as a motor fault detector.
The fault detector shuts off the amplifier circuits
should the motor stall or fail, and provides the neces 
sary "feedback" required to start the motor at each
inital power-up. Motor "fault" detector is performed
byU301B.
Operation
1. Normal
Tach signal is filtered by R306, CR301 and C302.
This position voltage DC level is compared to a fixed
voltage set by R307 and R308 by U301B. When the
motor is running, the output of U301B, is at the posi 
tive supply. This provides the duty cycle adjust po 
tentiometer R3 13 with the proper voltage.
2. Fault
When the tach signal is lost, U301B will swing to
the negative supply rail. This action causes a nega 
tive voltage level to be fed to the negative input of
U301D via R313. This forces the output of U301D to a
higher positive voltage which prohibits current to
the drive transistors.
3. Power Up
C303 serves to disable the fault detector during
power up by holding the comparator, U301B, to a
positive output state.
Commutation logic is controlled by three Hall 
effect devices located internal to the motor, 120
degrees apart. As the motor rotates, the Hall-effect
devices output a low to U302 A B, or C, depending
upon the degree of rotation. These, in turn, sequen 
tially turn on drivers Q302, Q303, and Q304 via
commutation logic U303A B, C, and D, and U304A
B, C, and D.
The motor utilizes a 3 phase "Y" connected float 
ing common stator. These are driven by commuta 
tion transistors Q305, Q306, Q307, Q308, Q309, and
Q310. Each winding uses a pair of transistors, one for
positive current flow and one for negative current
flow. Positive current is defined as from the end of
the leg to the center of the "Y." Because of the three
windings, and the pair of commutation transistors for
each leg, and a total of six current paths through the
windings, a total of twelve commutation "strokes"
per revolution is achieved.
6-5