Chapter 4 Remote Interface Reference
The SCPI Status Registers
107
4
To Determine When a Command Sequence is Completed
1
Send a device clear message to clear the power supply’s output buffer (e.g.,
CLEAR 705
).
2
Clear the event registers with the
*CLS
(clear status) command.
3
Enable the “operation complete” bit (bit 0) in the Standard Event register by
executing the
*ESE 1
command.
4
Send the
*OPC?
(operation complete query) command and enter the result to
ensure synchronization.
5
Execute your command string to program the desired configuration, and then
execute the
*OPC
(operation complete) command as the last command. When
the command sequence is completed, the “operation complete” bit (bit 0) is
set in the Standard Event register.
6
Use a serial poll to check to see when bit 5 (standard event) is set in the Status
Byte summary register. You could also configure the power supply for an SRQ
interrupt by sending
*SRE 32
(Status Byte enable register, bit 5).
Using *OPC to Signal When Data is in the Output Buffer
Generally, it is best to use the “operation complete” bit (bit 0) in the Standard
Event register to signal when a command sequence is completed. This bit is
set in the register after an
*OPC
command has been executed. If you send
*OPC
after a command which loads a message in the power supply’s output
buffer (query data), you can use the “operation complete” bit to determine
when the message is available. However, if too many messages are generated
before the
*OPC
command executes (sequentially), the output buffer will fill
and the power supply will stop processing commands.
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