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Allen-Bradley 1747-SN
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7–18 Application Examples
Publication
17476.6 - July 1996
Rung 2:3
When a BTR successfully completes, buffer the block transfer data and unlatch both
the BTR enable bit and the BTR pending bit. The data in this example is from
analog input 0 located at remote address: Logical Rack 3, Group 7, left slot (0).
This analog input is 4–20mA input from a transducer.
| |
| |
| VIRTUAL |
| BTR DONE |
| BIT BTR DATA |
| N7:60 +COP–––––––––––––––+ |
|––––] [––––––––––––––––––––––––––––––––––––––––––––––+–+COPY FILE +–+–|
| 13 | |Source #M1:1.110| | |
| | |Dest #N7:10| | |
| | |Length 2| | |
| | +––––––––––––––––––+ | |
| | SERVICE | |
| | THE BTR | |
| | STATUS/ | |
| | BTR | |
| | PENDING | |
| | B3:0 | |
| +––––(U)–––––––––––––––+ |
| | 0 | |
| | | |
| | | |
| | | |
| | BTR ENABLE | |
| | BIT | |
| | M0:1.100 | |
| +––––(U)–––––––––––––––+ |
| | 15 | |
| | | |
| | | |
| | | |
| | GOOD BTR | |
| | DATA BIT | |
| | B3:0 | |
| +––––(L)–––––––––––––––+ |
| 2 |
Rung 2:4
When a BTW successfully completes, unlatch the BTW enable bit and the BTW pending
bit to complete a BTW sequence.
| SERVICE |
| THE BTW |
| VIRTUAL STATUS/ |
| BTW DONE BTW |
| BIT PENDING |
| N7:64 B3:0 |
|––––] [––––––––––––––––––––––––––––––––––––––––––––––––––––––––+––––(U)–––––+–|
| 13 | 1 | |
| | | |
| | | |
| | | |
| | BTW ENABLE | |
| | BIT | |
| | M0:1.200 | |
| +––––(U)–––––+ |
| 15 |

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