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Altera CPLD - Hardware Circuit Description; Power; Clock; I;O Ports

Altera CPLD
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Translated without permission by organicmonkeymotion.wordpress.com V1 11/01/2014
4
Hardware Circuit Description
Power
Use an external 5V DC power supply. Please note that the polarity of an external 5V DC power
supply is positive (+ve) with respect to center.
Clock
CPLD (pin) P12 is provided with the 50M Hz clock frequency of the active crystal U3.
I/O ports
I / O ports are assigned as follows:
LED1: P86
LED2: P87
LED3: P96
LED4: P89
LED5: P97
LED6: P91
LED7: P92
LED8: P95
LEDA : P85 LEDB : P84 LEDC : P83 LEDD : P82
LEDE : P81 LEDF : P78 LEDG : P77 LEDH : P76
When LED1 to LED8 is low, LEDA to LEDH(LEDDP)
is low to light LED segment

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