Do you have a question about the Altera DE1-SoC and is the answer not in the manual?
Lists all items included in the DE1-SoC Development Kit package for user convenience.
Details the documents and supporting materials available on the DE1-SoC System CD.
Provides contact information for technical assistance from Altera and Terasic.
Identifies key connectors and components on the DE1-SoC development board.
Presents a block diagram illustrating the DE1-SoC board's system architecture.
Explains how to set the FPGA configuration mode using DIP switches.
Details the JTAG and Active Serial (AS) programming methods for the FPGA.
Describes onboard LEDs for status indication and HPS reset buttons.
Details the clock signals and their distribution on the DE1-SoC board.
Describes interfaces connecting peripherals to the FPGA for user logic control.
Explains the functionality of user push-buttons, slide switches, and LEDs.
Details the six 7-segment displays and their FPGA pin assignments.
Describes the 2x20 pin expansion headers for connecting daughter cards.
Details the WM8731 audio codec for audio input and output.
Explains the I2C multiplexer used for accessing I2C devices.
Describes the VGA output connector and its timing specifications.
Details the ADV7180 TV decoder for video signal input and processing.
Explains the infrared receiver module and emitter LED for remote control.
Details the 64MB SDRAM chip and its connections to the FPGA.
Describes the PS/2 serial port for keyboard and mouse connectivity.
Details the 8-channel Analog-to-Digital Converter and its header.
Describes interfaces connected to the Hard Processor System (HPS).
Explains HPS-specific user interface elements like buttons and LEDs.
Details the Gigabit Ethernet PHY and its pin assignment.
Describes the UART interface for serial communication via USB.
Details the 1GB DDR3 SDRAM connected to the HPS.
Describes the Micro SD card socket for storage and boot options.
Details the USB 2.0 host ports and associated controller.
Explains the ADXL345 accelerometer and its I2C/SPI interfaces.
Describes the 14-pin LTC connector for daughter card communication.
Introduces the Windows-based utility for creating Quartus II projects for DE1-SoC.
Outlines the design flow for building Quartus II projects using the System Builder.
Provides detailed procedures for installing and using the DE1-SoC System Builder utility.
Demonstrates the default board configuration and its features.
Shows how to implement audio recording and playback using the CODEC.
Explains how to set up a Karaoke machine using audio ports and CODEC.
Illustrates testing SDRAM access and performance using Nios II.
Demonstrates SDRAM testing using Verilog HDL.
Details setting up the DE1-SoC as a TV box using video components.
Demonstrates bi-directional communication with a PS/2 mouse.
Explains using the IR emitter LED and receiver for infrared communication.
Illustrates evaluating the performance of the 8-channel A/D converter.
Guides on developing and building a basic HPS program using Altera SoC EDS.
Shows how to control HPS LEDs and keys via GPIO registers.
Demonstrates controlling the G-sensor by accessing its registers via I2C.
Explains switching the I2C multiplexer to allow HPS to access I2C buses.
Demonstrates HPS controlling FPGA LEDs and HEX displays through the bridge.
Shows a comprehensive example implementing a GUI to control board peripherals.
Sets the FPGA to AS x4 mode required for using the quad Flash configuration device.
Details the steps to convert a .sof file to a .jic file using Quartus II Programmer.
Explains how to program the EPCQ device using the generated .jic file.
Describes the procedure to erase existing files from the EPCQ device.
Notes a known problem regarding Nios II booting from the EPCQ device in Quartus II.
Lists the version history and changes made to the DE1-SoC User Manual.
| Architecture | ARM Cortex-A9 |
|---|---|
| HPS Clock Speed | 800 MHz |
| FPGA Logic Elements | 85K |
| SD Card Slot | Yes |
| Ethernet | 10/100/1000 Mbps |
| HDMI | Yes |
| Switches | 4 |
| Push-buttons | 4 |
| Clock Input | 50 MHz |
| Video Output | HDMI |
| SDRAM | 1 GByte |
| USB | USB 2.0 |
| Audio | 24-bit CODEC |
| ADC | 12-bit |
| Expansion Headers | Two 40-pin headers |