Altera DE1-SoC - DE1-SoC LTC Connector Details

DE1-SoC User Manual
51
www.terasic.com
March 14, 2014
HPS.
Figure 3-35 Connections between Cyclone V SoC FPGA and G-Sensor
Table 3-30 Pin Assignment of G-senor
Signal Name
FPGA Pin No.
Description
I/O Standard
HPS_GSENSOR_INT
PIN_B22
HPS GSENSOR Interrupt Output
3.3V
HPS_I2C1_SCLK
PIN_E23
HPS I2C Clock (share bus with LTC)
3.3V
HPS_I2C1_SDAT
PIN_C24
HPS I2C Data (share bus)
3.3V
3
3
.
.
7
7
.
.
8
8
L
L
T
T
C
C
C
C
o
o
n
n
n
n
e
e
c
c
t
t
o
o
r
r
The board has a 14-pin header, which is originally used to communicate with various daughter
cards from Linear Technology. It is connected to the SPI Master and I2C ports of HPS. The
communication with these two protocols is bi-directional. The 14-pin header can also be used for
GPIO, SPI, or I2C based communication with the HPS. Connections between the HPS and LTC
connector are shown in Figure 3-36, and the pin assignment of LTC connector is listed in Table
3-31.
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