Altera DE1-SoC - DE1-SoC PS;2 Interface

DE1-SoC User Manual
40
www.terasic.com
March 14, 2014
DRAM_DQ[6]
PIN_AK11
SDRAM Data[6]
3.3V
DRAM_DQ[7]
PIN_AJ11
SDRAM Data[7]
3.3V
DRAM_DQ[8]
PIN_AH10
SDRAM Data[8]
3.3V
DRAM_DQ[9]
PIN_AJ10
SDRAM Data[9]
3.3V
DRAM_DQ[10]
PIN_AJ9
SDRAM Data[10]
3.3V
DRAM_DQ[11]
PIN_AH9
SDRAM Data[11]
3.3V
DRAM_DQ[12]
PIN_AH8
SDRAM Data[12]
3.3V
DRAM_DQ[13]
PIN_AH7
SDRAM Data[13]
3.3V
DRAM_DQ[14]
PIN_AJ6
SDRAM Data[14]
3.3V
DRAM_DQ[15]
PIN_AJ5
SDRAM Data[15]
3.3V
DRAM_BA[0]
PIN_AF13
SDRAM Bank Address[0]
3.3V
DRAM_BA[1]
PIN_AJ12
SDRAM Bank Address[1]
3.3V
DRAM_LDQM
PIN_AB13
SDRAM byte Data Mask[0]
3.3V
DRAM_UDQM
PIN_AK12
SDRAM byte Data Mask[1]
3.3V
DRAM_RAS_N
PIN_AE13
SDRAM Row Address Strobe
3.3V
DRAM_CAS_N
PIN_AF11
SDRAM Column Address Strobe
3.3V
DRAM_CKE
PIN_AK13
SDRAM Clock Enable
3.3V
DRAM_CLK
PIN_AH12
SDRAM Clock
3.3V
DRAM_WE_N
PIN_AA13
SDRAM Write Enable
3.3V
DRAM_CS_N
PIN_AG11
SDRAM Chip Select
3.3V
3.6.11 PS/2 Serial Port
The DE1-SoC board comes with a standard PS/2 interface and a connector for a PS/2 keyboard or
mouse. Figure 3-27 shows the connection of PS/2 circuit to the FPGA. Users can use the PS/2
keyboard and mouse on the DE1-SoC board simultaneously by a PS/2 Y-Cable, as shown in Figure
3-28. Instructions on how to use PS/2 mouse and/or keyboard can be found on various educational
websites. The pin assignment associated to this interface is shown in Table 3-21.
Note: If users connect only one PS/2 equipment, the PS/2 signals connected to the FPGA I/O should
be “PS2_CLK” and “PS2_DAT”.
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