Altera DE1-SoC - HPS Peripheral Connections; HPS User Input;Output Devices

DE1-SoC User Manual
43
www.terasic.com
March 14, 2014
Figure 3-30 Connections between the FPGA, 2x5 header, and the A/D converter
Table 3-22 Pin Assignment of ADC
Signal Name
FPGA Pin No.
Description
I/O Standard
ADC_CS_N
PIN_AJ4
Chip select
3.3V
ADC_DOUT
PIN_AK3
Digital data input
3.3V
ADC_DIN
PIN_AK4
Digital data output
3.3V
ADC_SCLK
PIN_AK2
Digital clock input
3.3V
3
3
.
.
7
7
P
P
e
e
r
r
i
i
p
p
h
h
e
e
r
r
a
a
l
l
s
s
C
C
o
o
n
n
n
n
e
e
c
c
t
t
e
e
d
d
t
t
o
o
H
H
a
a
r
r
d
d
P
P
r
r
o
o
c
c
e
e
s
s
s
s
o
o
r
r
S
S
y
y
s
s
t
t
e
e
m
m
(
(
H
H
P
P
S
S
)
)
This section introduces the interfaces connected to the HPS section of the Cyclone V SoC FPGA.
Users can access these interfaces via the HPS processor.
3
3
.
.
7
7
.
.
1
1
U
U
s
s
e
e
r
r
P
P
u
u
s
s
h
h
-
-
b
b
u
u
t
t
t
t
o
o
n
n
s
s
a
a
n
n
d
d
L
L
E
E
D
D
s
s
Similar to the FPGA, the HPS also has its set of switches, buttons, LEDs, and other interfaces
connected exclusively. Users can control these interfaces to monitor the status of HPS.
Table 3-23 gives the pin assignment of all the LEDs, switches, and push-buttons.
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