Altera DE1-SoC - SDRAM Memory

DE1-SoC User Manual
38
www.terasic.com
March 14, 2014
Figure 3-25 Connection between the FPGA and IR emitter LED
Table 3-19 Pin Assignment of IR Emitter LED
Signal Name
FPGA Pin No.
Description
I/O Standard
IRDA_TXD
PIN_ AB30
IR Emitter
3.3V
3.6.10 SDRAM Memory
The board features 64MB of SDRAM with a single 64MB (32Mx16) SDRAM chip. The chip
consists of 16-bit data line, control line, and address line connected to the FPGA. This chip uses the
3.3V LVCMOS signaling standard. Connections between the FPGA and SDRAM are shown in
Figure 3-26, and the pin assignment is listed in Table 3-20.
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