Altera DE1-SoC - DE1-SoC System Builder Design Flow

DE1-SoC User Manual
53
www.terasic.com
March 14, 2014
Chapter 4
DE1-SoC System
Builder
This chapter describes how users can create a custom design project with the tool named DE1-SoC
System Builder.
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The DE1-SoC System Builder is a Windows-based utility. It is designed to help users create a
Quartus II project for DE1-SoC within minutes. The generated Quartus II project files include:
 Quartus II project file (.qpf)
 Quartus II setting file (.qsf)
 Top-level design file (.v)
 Synopsis design constraints file (.sdc)
 Pin assignment document (.htm)
The above files generated by the DE1-SoC System Builder can also prevent occurrence of situations
that are prone to compilation error when users manually edit the top-level design file or place pin
assignment. The common mistakes that users encounter are:
 Board is damaged due to incorrect bank voltage setting or pin assignment.
 Board is malfunctioned because of wrong device chosen, declaration of pin location or
direction is incorrect or forgotten.
 Performance degradation due to improper pin assignment.
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This section provides an introduction to the design flow of building a Quartus II project for
DE1-SoC under the DE1-SoC System Builder. The design flow is illustrated in Figure 4-1.
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