Altera DE1-SoC - DE1-SoC Clock Distribution

DE1-SoC User Manual
20
www.terasic.com
March 14, 2014
Figure 3-10 HPS cold reset and warm reset buttons on DE1-SoC
Table 3-4 Description of Two HPS Reset Buttons on DE1-SoC
Board Reference
Signal Name
Description
KEY5
HPS_RESET_N
Cold reset to the HPS, Ethernet PHY and USB host device.
Active low input which resets all HPS logics that can be reset.
KEY7
HPS_WARM_RST_N
Warm reset to the HPS block. Active low input affects the
system reset domain for debug purpose.
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