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AMD XILINX VEK280 - Page 48

AMD XILINX VEK280
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3/20/24, 12:51 PM
Unofficial Document
https://docs.amd.com/internal/api/webapp/print/d54fa025-f5b0-4797-be6e-41b3e31f9548
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Versal Device Pin Signal Power Domains
PMC MIO 11 VCC_AUX_1V2_EN VCCAUX_PMC, VCC_PSFP,
VCCAUX, UTIL_0V9,
VCC1V1_LP4, VCC1V5,
LPDMGTYAVCC, VCCO_MIO,
PMC MIO 49 VCC_PSLP_EN LPDMGTYAVCC,
LPDMGTYAVTT
LPD MIO 12 VCC_PSFP_EN VCC_PSFP
LPD MIO 13 VCC_SOC_EN VCC_SOC
LPD MIO 20 VCC_PL_EN VCCINT, VCCO_HDIO_3V3,
VCC1V5, MGTAVTT, VCC_RAM,
MGTAVCC, MGTVCCAUX
LPD MIO 23 VADJ_FMC_EN VADJ_FMC
Note: See LPD MIO[23]: VADJ_FMC Power Rail for more information.
LPD MIO[21:22] Fan PWM
The Versal device PS bank 502 MIO21 (MIO21_FAN_PWM_VERSAL) is connected to
J347 pin 3. When J347 is selected as 2-3 (see Jumpers for defaults), the Versal
device is able to control the fan PWM speed. A controller application must be
created to drive this logic. The Versal device PS bank 502 MIO22
(MIO22_FAN_TACH_VERSAL) is connected J348 pin 3. This signal is fed by a
2N7002 MOSFET (Q46), which is in turn connected to the 12V fan tachometer
feedback. The 2N7002 is a N-Channel 60 V MOSFET. For more details, see Cooling
Fan Connector.
LPD MIO[23]: VADJ_FMC Power Rail
Warning: The VEK280 board can only be used with FMC cards that can support
1.5V. The VEK280 board exposes FMC add-on cards requiring lower than 1.5V
levels to this higher voltage.
The VITA 57.4 FMC+ Industry Standard calls out not only specific connectors, but
behaviors of the devices being connected. This creates a highly adaptable and
flexible interface allowing a best fit for many industries and prototyping needs.
While AMD strives to adhere to all standards providing customers with the best

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