✎
Rail Rail Name Nominal Voltage (V)Max Current (A)Device PMBUS AddrINA226 Addr
15 LPDMGTYAVTT 1.20 6 U167 A, U316 0x4C 0x4C
BUS2
16 LPDMGTYVCCAUX1.50 0.5 U175 LDO 0x4D 0x4D
BUS2
17 MGTAVCC 0.92 4 U160 D 0x47 0x42
BUS2
18 MGTAVTT 1.20 6 U295 0x49 0x46
BUS2
19 MGTVCCAUX 1.50 0.5 U160 LDO 0x47 0x48
BUS2
20 VCCO_HDIO_3V3 3.3 2 U175 A 0x4D 0x46
BUS1
21 UTIL_1V8 1.80 2 U354 0x4F N/A
22 UTIL_2V5 2.50 2 U160 B 0x47 N/A
23 UTIL_1V0 1.00 0.4 U167 LDO 0x4C N/A
Note: Bus short names are decoded as:
I2C Address – PMBUS_SDA/SCL
BUS1 - PMBUS1_INA226_SDA/SCL
BUS2 - PMBUS2_INA226_SDA/SCL
See PMC MIO[46:47] I2C0 Bus for I2C diagrams and more details.
The FMCP HSPC (J51) VADJ pins are wired to the programmable rail VADJ_FMC.
The VADJ_FMC rail is programmed to 1.50V by default. The VADJ_FMC rail also
powers the XCVE2802 FMCP interface banks 709 and 710 (see the table in I/O
Voltage Rails). Documentation describing PMBus programming for the Infineon
power controllers is available on the Infineon Integrated Circuits website. The PCB
layout and power system design meet the recommended criteria described in the
Versal Adaptive SoC PCB Design User Guide (UG863).
Table: Power System – Non-PMBus Regulators
To Next Page
Loading...
