Applying this formula to the model 7270 at the maximum value of INPUT LIMIT
(2.0 V) and the smallest available value of FULL-SCALE SENSITIVITY (2 nV),
gives a maximum available dynamic reserve of about 1 × 10
9
or 180 dB. Figures of
this magnitude are available from any DSP lock-in amplifier but are based only on
arithmetical identities and do not give any indication of how the instrument actually
performs. In fact, all current DSP lock-in amplifiers become too noisy and inaccurate
for most purposes at reserves of greater than about 100 dB.
For the benefit of users who prefer to have the AC Gain value expressed in decibels,
the model 7270 displays the present value of Dynamic Reserve (DR) in this form, on
the input full-scale sensitivity control, for values up to 100 dB. Above 100 dB the
legend changes to “DR>100”.
3.3.05 Anti-Aliasing Filter
The signal then passes through an anti-aliasing filter to remove unwanted frequencies
which would cause a spurious output from the main ADC as a result of the sampling
process.
Consider the situation when the lock-in amplifier is measuring a sinusoidal signal of
frequency f
signal
Hz, which is sampled by the main ADC at a sampling frequency
f
sampling
Hz. In order to ensure correct operation of the instrument the output values
representing the f
signal
frequency must be uniquely generated by the signal to be
measured, and not by any other process.
However, if the input to the ADC has, in addition, an unwanted sinusoidal signal
with frequency f
1
Hz, where f
1
is greater than half the sampling frequency, then this
will appear in the output as a sampled-data sinusoid with frequency less than half the
sampling frequency, f
alias
= |f
1
- nf
sampling
|, where n is an integer. This alias signal is
indistinguishable from the output generated when a genuine signal at frequency f
alias
is sampled. Hence if the frequency of the unwanted signal were such that the alias
signal frequency produced from it was close to, or equal to, that of the wanted signal
then it is clear that a spurious output would result.
For example, at the sampling frequency of 1.0 MHz then half the sampling frequency
is 500 kHz. If a signal of 40 kHz accompanied by an interfering signal of 950 kHz
was then applied, the output of the ADC would include a sampled-data sinusoid of
40 kHz (the required signal) and, applying the above formula, an alias signal of
50 kHz (i.e. |950 kHz - 1000 kHz|). f the signal frequency were now increased
towards 50 kHz then the output of the lock-in amplifier would increasingly be
affected by the presence of the alias signal and the accuracy of the measurement
would deteriorate.
To overcome this problem the signal is fed through the anti-aliasing filter which
restricts the signal bandwidth to an upper frequency of less than 250 kHz The filter is
a conventional elliptic-type, low-pass, stage, giving the lowest possible noise
bandwidth.
It should be noted that the dynamic range of a lock-in amplifier is normally so high
that practical anti-alias filters are not capable of completely removing the effect of a
full-scale alias. For instance, even if the filter gives 100 dB attenuation, an alias at
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