UG-072 Evaluation Board User Guide
Rev. A | Page 8 of 20
TYPICAL SETUPS
ALL SETUPS
The switch and jumper settings in Table 5 are common for all
typical setups described in this user guide.
Table 5. Standard Switch and Jumper Settings
Component Setting
LK15, LK18,
LK20 to LK25
Jumper on
S3-4 0 (right)
S3-5 0 (right)
S4 Down (for default I
2
C communication)
S5 Left (for default I
2
C communication)
ANALOG INPUT AND ANALOG OUTPUT
Input comes from the stereo analog inputs to Pin ADC0 and
Pin ADC1 of the ADAU1401A and outputs on the DACs.
Default outputs for the ADC inputs are DAC outputs, VOUT2
and VOUT3.
In this setup, the master clock is generated by the ADAU1401A’s
oscillator connected to a 12.288 MHz crystal. Table 6 explains
how the switches and jumpers need to be set up for this mode.
Any component setting not mentioned in Table 6 or in Table 5
can be considered don’t care.
The settings in Table 5 and Table 6 are also appropriate for
using the serial data I/Os.
Table 6. Evaluation Board Settings for Analog I/O
Component Setting
S2 Position 1
S3-3 1 (left)
LK1 Connected
LK2 to LK4 Disconnected
LK5 to LK6,
LK9 to LK14
A for active filter, and B for passive filter on
DAC outputs
LK16 Connected
LK17 Disconnected
S/PDIF INPUT AND S/PDIF OUTPUT
Input comes from the stereo S/PDIF receiver to SDATA_IN0
(Pin 10) of the ADAU1401A and outputs on whichever outputs
(SDATA_OUTx) are designated in the SigmaStudio software.
The default output for the input is SDATA_OUT0 (Pin 15).
In this setup, the master clock and serial data clocks are
generated by the CS8416. Table 7 explains how the switches
and jumpers need to be set up for this mode. Any component
setting not mentioned in Table 7 can be considered don’t care.
Table 7. Evaluation Board Settings for S/PDIF Input, Analog
and S/PDIF Output
Component Setting
S2 Position 0
S3-2 0 (right)
S3-3 1 (left)
LK1, LK3 to LK4 Disconnected
LK2 Connected
LK5 to LK6,
LK9 to LK14
A for active filter, and B for passive filter on
DAC outputs
LK16 Disconnected
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