Anritsu SQA-R MP1900A - Module Selection Guide

24
Module Selection Guide
Refer to the Selection Guide (MP1900A-E-Z-1) for details on the module and option combinations.
Category Model Name
PCIe Gen1 to Gen5
Receiver
Compliance Test*
1
PCIe Gen1 to Gen5
Receiver
Compliance Test*
1
PCIe Gen6 BER/JTOL Test
SAS
Receiver Test
Main Frame MP1900A Signal Quality Analyzer-R 1 1 1
Synthesizer
MU181000B 12.5 GHz 4 Port Synthesizer 1 1 1
MU181000B-001 Jitter Modulation Source
MU181000B-002 SSC Extension 1 1
Jitter Modulation MU181500B Jitter Modulation Source 1 1 1
21G/32G PPG
MU195020A 21G/32G bit/s SI PPG 1 1
MU195020A-001 32G bit/s Extension 1*
2
1*
2
MU195020A-010 1ch Data Output 1 1
MU195020A-020 2ch Data Output (1)*
3
(1)*
3
MU195020A-011 1ch 10Tap Emphasis 1 1
MU195020A-021 2ch 10Tap Emphasis (1)*
3
(1)*
3
MU195020A-030 1ch Data Delay
MU195020A-031 2ch Data Delay (1)*
3
(1)*
3
MU195020A-040 1ch Variable ISI 1*
4
1*
4
MU195020A-041 2ch Variable ISI 1*
4
1*
4
MU195020A-050 Sequence Editor Function 1*
7
21G/32G ED
MU195040A 21G/32G bit/s SI ED 1 1 1
MU195040A-001 32G bit/s Extension 1*
2
1*
2
1*
2
MU195040A-010 1ch ED 1 1 1
MU195040A-020 2ch ED
MU195040A-011 1ch CTLE 1 1 1
MU195040A-021 2ch CTLE
MU195040A-022 Clock Recovery 1 1 1
PAM4 PPG
MU196020A PAM4 PPG 1
MU196020A-001 32G baud 1
MU196020A-002 58G baud
MU196020A-003 64G baud
MU196020A-011 4Tap Emphasis 1
MU196020A-030 Data Delay
MU196020A-040 Adjustable ISI
MU196020A-042 FEC Pattern Generation
MU196020A-050 Inter-Module Synchronization
PAM4 ED
MU196040B PAM4 ED 1*
6
MU196040B-001 32G baud (2.4G to 32.1G) 1*
6
MU196040B-002 58G baud (NRZ: 2.4G to 64.2G, PAM4: 2.4G to 58.2G)
MU196040B-011 Equalizer 1*
6
MU196040B-021 29G baud Clock Recovery (2.4G to 29G)
MU196040B-022 32G baud Clock Recovery (2.4G to 32.1G) 1*
6
MU196040B-023 58G baud Clock Recovery Extension (51G to 58.2G)
MU196040B-041 SER Measurement 1
Voltage Noise
MU195050A Noise Generator 1 1 1
MU195050A-001 White Noise
Software
MX183000A-PL001 Jitter Tolerance Test 1 1
MX183000A-PL021 PCIe Link Training 1 1
MX183000A-PL025 PCIe 5 Link Training 1*
5
1*
5
MX183000A-PL022 USB Link Training
*
1: Anritsu is an active member of PCI-SIG and is fully engaged in helping establish new PCI Express specifications.
*
2: Supports PCIe Gen5 test and SAS-4 test.
*
3: A near-to-real environment crosstalk signal can be generated by using two channels.
*
4: Supports Gen5 Base Spec Receiver test and SAS Receiver test.
*
5: Supports Gen5 CEM Spec Receiver test.
*
6: The PAM4 ED is for future PCIe 6.0 BER/JTOL measurements. Please contact our business section regarding support for PCIe 6.0 receiver tests.
*
7: Used at PCIe Gen1 to 4 Link Training debugging; contact our Business Section about support for PCIe Gen5.