AOpen MX4GVR - DMA (Direct Memory Access); ECC (Error Checking and Correction); EDO (Extended Data Output) Memory; EEPROM (Electronic Erasable Programmable ROM)

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Channel for communications between the memory and surrounding devices.
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The ECC mode needs 8 ECC bits for 64-bit data. Each time memory is accessed; ECC bits are updated and checked by a special
algorithm. The ECC algorithm has the ability to detect double-bit error and automatically correct single-bit error while parity mode
can only detect single-bit error.
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The EDO DRAM technology is actually very similar to FPM (Fast Page Mode). Unlike traditional FPM that tri-states the memory
output data to start the pre-charge activity, EDO DRAM holds the memory data valid until the next memory access cycle, that is
similar to pipeline effect and reduces one clock state.
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Also known as E
2
PROM. Both EEPROM and Flash ROM can be re-programmed by electronic signals, but the interface technology
is different. Size of EEPROM is much smaller than flash ROM.
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Traditional motherboard stores BIOS code in EPROM. EPROM can only be erased by ultra-violet (UV) light. If BIOS has to be
upgraded, you need to remove EPROM from motherboard, clear by UV light, re-program, and then insert back.