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AOpen MX4GVR User Manual

AOpen MX4GVR
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For Socket 7 CPU, one burst data read requires four QWord (Quad-word, 4x16 = 64 bits). PBSRAM only needs one address
decoding time and automatically sends the remaining QWords to CPU according to a predefined sequence. Normally, it is 3-1-1-1,
total 6 clocks, which is faster than asynchronous SRAM. PBSRAM is often used on L2 (level 2) cache of Socket 7 CPU. Slot 1 and
Socket 370 CPU do not need PBSRAM.
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SDRAM DIMM that supports 100MHz CPU FSB bus clock.
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SDRAM DIMM that supports 133MHz CPU FSB bus clock.
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Based on FSB frequency, the DDR DRAM has 200MHz, 266MHz and 333 MHz three types of working frequency. Because of DDR
DRAM data bus is 64-bit, it provides data transfer bandwidth up to 200x64/8=1600MB/s, 266x64/8=2100MB/s, 333x64/8=2700MB/s
and 400x64/8=3200MB/s. Hence, the PC-1600 DDR DRAM is working with 100MHz, PC-2100 DDR DRAM is working with 133MHz,
PC-2700 DDR DRAM is working with 166MHz and PC-3200 DDR DRAM is working with 200MHz FSB frequency.

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AOpen MX4GVR Specifications

General IconGeneral
BrandAOpen
ModelMX4GVR
CategoryMotherboard
LanguageEnglish

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