78
INTEGRATED CIRCUIT DIAGRAMS
TAO103A amplifier pinout diagram and pin description table
Pin Function Description
1 AGND Analog ground
2 OVERLOADB Logic output. When low, indicates that the level of the input signal has
overloaded the amplifier.
3 V5 Positive 5 Volts.
4 MUTE Logic input. When high, both amplifiers are muted. When low
(grounded), both amplifiers are fully operational.
5, 6 IN2, IN1 Single-ended input (channel 1 and 2).
7, 8 BBM0, BBM1 Break-before-make timing control.
9, 12 GNDKELVIN1,
GNDKELVIN2
Kelvin connection to speaker ground (channel 1 and 2).
10, 11 OCR1, OCR2 Over-current threshold adjustment (channel 1 and 2).
13, 14 OCS1L+, OCS1L- Over-current sense resistor, channel 1 low side.
15, 16 OCS1H+, OCS1H- Over-current sense resistor, channel 1 high side.
17, 30 LO1COM, LO2COM Kelvin connection to source of low-side transistor (channel 1 and 2).
18, 29 FDBKN1, FDBKN2 Feedback (channel 1 and 2).
19 VN12 Voltage: +12V from Vsneg.
20, 27 LO1, LO2 Low side gate drive output (channel 1 and 2).
21, 26 HO1COM, HO2COM Kelvin connection to source of high-side transistor (channel 1 and 2).
22, 25 HO1, HO2 High side gate drive output (channel 1 and 2).
23 Vspos Positive supply voltage.
24 Vsneg Negative supply voltage.
28 PGND Power ground
31, 32 OCS2L-, OCS2L+ Over current sense resistor, channel 2 low side.
33, 34 OCS2H-, OCS2H+ Over current sense resistor, channel 2 high side.
35 HMUTE Logic output. When high, indicates that the output stages of both
amplifiers are shut off and muted.
36, 37, 38 NC Not connected. Must be left floating.
38 37 36 35 34 33 32 31 30 29 28
9 10111213141516171819
1
2
3
4
5
6
7
8
27
26
25
24
23
22
21
20
NC
NC
NC
HMUTE
OCS2H+
OCS2H-
OCS2L+
OCS2L-
LO2COM
FDBKN2
PGND
GND KELVIN1
OCR2
OCR1
GND KELVIN2
OCS1L+
OCS1L-
OCS1H+
OCS1H-
LO1COM
FDBKN1
VN12
AGND
OVERLOADB
V5
IN2
IN1
BBM0
BBM1
MUTE
LO2
HO2COM
HO2
Vsneg
Vspos
HO1
H01COM
LO1
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