Product Application Note ■ BCM5221
7/7/00 ■ BCM5220
Broadcom Corporation
5221/5220-AN01 Product Application Note, Revision R Page 14
After the 1 is written to bit 3 of MII shadow register 1Ah, set the JTAG_EN signal high to enable JTAG operation.
Alternative Method. After a normal reset, the BCM5221 JTAG signal pins for TDI and TMS are used to source LNKLED#
and SPDLED# signals. At this point if the JTAG_EN signal is set high without first completing the above two writes, then
there is a potential contention between JTAG signals and the BCM5221 signals driving the same pins. However, even if the
Preferred Method is not followed, analysis has shown that the inherent current limiting capability of Broadcom LED output
buffers is such that there will be no reliability impact as long as the above two writes are executed within 5 seconds of
JTAG_EN being set high.
SUPPLY PINS AND POWER PLANES
This section describes the power pins and recommended power plane partitioning for the BCM5221 as well as detailed de-
scriptions of each type of power supply pin.
A solid power supply plane is always recommended for each supply required by the application. If the design calls for both
2.5V and 3.3V supples, then dedicated board layers should be provided for each supply. Fragmenting, segmenting, or oth-
erwise interrupting a power supply plane is not recommended.
The BCM5221 is essentially a 2.5V device with on-chip regulators, making it suitable for 3.3V applications. To clarify the
purpose of the power pin types, each type is listed and defined below (See Figure 1 on page 2).
OVDD. This pin supplies power to the digital input and output buffer stages of the BCM5221. By connecting OVDD to a
3.3V power rail, all of the 3.3V tolerant digital inputs accepts either CMOS or TTL input signaling or static levels. If the system
design allows for all input signaling to be limited to a maximum swing of 2.5V, the OVDD pin can be connected to the 2.5V
rail.
REGAVDD and REGDVDD. These voltage regulator input pins should be connected to the 3.3V system power rail only
if the device is to be powered from a single 3.3V supply (See Figure 1). These pins should be left unconnected in applications
where the BCM5221 is powered by 2.5V.
DVDD. In 3.3V applications, these pins serve as connection points for the internal digital core circuitry to allow for external
supply filtering. In 2.5V applications, these pins must be connected to an external 2.5V supply to supply power to the core.
AVDD. In 3.3V applications, these pins serve as connection points for the internal analog circuitry to allow for external sup-
ply filtering. In 2.5V applications, these pins must be connected to an external 2.5V supply to power the analog circuits.
BIASVDD. This pin, which supplies power to internal bias circuitry, should always be connected to the AVDD pins.
MULTI-PORT DESIGNS
For applications requiring two or three ports (such as uplinks or router designs), multiple BCM5221 PHYs can be implement-
ed.
For BCM5221 multi-port applications, Broadcom recommends that VDD and GND are implemented via uninterrupted power
and ground planes for the entire system with the exception of chassis ground.
See Figure 8 on page 15 for a simplified illustration of a BCM5221 multi-port power plane layout recommendation.
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