F. Inverter Operation
The Inverter circuit (Figure S-5) and PWM control are only active under Battery mode.
The Inverter circuit of Blazer is based on a push-pull circuitry and its output is driven by
transistors which is controlled by CPU.
Refer to the Inverter circuit diagram, the DS1(PWM signal ) and DS2 (PWM signal)
signals are generated by CPU. Figure W-3 illustrates the waveforms of DS1 and DS2 while
the system is at no load condition. the duty cycles of DS1 and DS2 signals are controlled by
feedback signal of output voltage (please refer Charger circuit) to get a stable output.
The gates of MOSFETs are driven by transistors Q20,Q24 ,Q23,Q25 which are controlled
by the DS1 and DS2 from CPU pin 11 and 26. Figure W-4 shows the collector
waveforms for
transistor pairs Q20,Q24 ,Q23,Q25 while the system is at no load condition.
C24 and R83 are used to eliminate the inverter transformer energy spikes due to the
MOSFET transferring from ON to OFF. First, energy is stored on C27 (through D28 and D29)
until the MOSFET are turned on. This reduces energy spikes which are generated during the
MOSFET power-down period. It also makes sure that the V
DS
voltage output are not to be
over rated while MOSFET turning off.
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