Cisco UCS C480 M5 Memory Guide
6
Memory Configurations and Modes
Memory Configurations and Modes
DIMM Guidelines
NOTE: For more details on DIMM population and guidelines, see DIMM Population
Rules, page 14.
■ System speed is dependent on the CPU DIMM speed support. Refer to Table 1 on page 5 for
DIMM speeds.
■ The C480 M5 server supports three different memory reliability, availability, and
serviceability (RAS) modes:
— Independent Channel Mode
— Mirrored Channel Mode
— Lockstep Channel Mode
NOTE: Mixing of Non-Mirrored and Mirrored mode is not allowed.
■ Do not mix RDIMMs, LRDIMMs, and TSV-RDIMMs.
■ Single-rank DIMMs can be mixed with dual-rank DIMMs in the same channel
■ For best performance, observe the following:
— DIMMs with different timing parameters can be i
nstalled on different slots within the
same channel, but only timings that support the slowest DIMM will be applied to all.
As a consequence, faster DIMMs will be operated at timings supported by the slowest
DIMM populated.
— When one DIMM is used, it must be populated
in DIMM slot 1 (farthest away from the
CPU) of a given channel.
— When single or dual rank DIMMs are populated for two
DIMMs per channel (2DPC),
always populate the higher number rank DIMM first (starting from the farthest slot).
For example, first populate slot 1 with dual rank DIMMs. Then populate DIMM slot 2
with single-rank DIMMs.
■ DIMMs for all four CPUs must always be configured identically.
■ Cisco memory from previous generation servers (DDR3 and DDR4) is not compatible or
supported with the UCS C480 server
NOTE: System performance is optimized when the DIMM type and quantity are equal
for both CPUs, and when all channels are filled equally across the CPUs in the server.