-5-
CZ209/CZ209A
PLL phase compare ERROR output.
The power supply control signal outpur for
The power supply control signal outpur for
At receiving the FM station, this port detects
the stereo signal. At seeking or scanning,
this port detects the station detection signal.
052-3995-90 LC87F1HC8A-F5AF1-E CMOS LSI eight bit single-chip
USB host control microcomputer
051-6928-90 341S2094 iPod attestation and broadcasting
INT3 input (input with noise filter)/
0 timer event input/timer 0H capture input/
infrared rays remote control reception input.
Input terminal for 32.768kHz crystal
Input terminal for ceramic/crystal departure
Output terminal for ceramic/crystal departure
Timer 1PWMH output/buzzer output.
System clock output/audio interface
Timer 6 toggle output/audio interface
Timer 7 toggle output/audio interface
SI04 data I/O/RD output in parallel interface.
SI04 clock I/O/INT7 input/timer 0H capture1
USB data I/O terminal UHD-/general
USB data I/O terminal UHD+/ general
PLL filter circuit connection terminal for USB
PLL filter circuit connection terminal for audio
Inside limit switch signal input.
Output for INT0 input/HOLD release input/
timer 0L capture input/watchdog timer.
INT1 input/HOLD release input/timer 0H
INT2 input/HOLD release input/0 timer event
input/timer 0L capture input/high-speed clock
Supply voltage, positive terminal.
32.768 kHz crystal oscillator or external
CLOCK_OUT enable (active high).
I
2
C slave address selection.
I
2
C slave address selection.
I
2
C slave address selection.
CP ready to receive next instruction
Operating voltage selection.
Communication mode selection.
Communication mode selection.
Connect via 100 kohm 1% resistor to VCC.
SPI slave select (active low) .
SPI master-to-slave data.
SPI slave-to-master data.
32.768KHz clock output, if selected by
Supply voltage, negative terminal.
Supply voltage, positive terminal.