5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
6-03-02136-031
Single link
LVDS
1
Power
MODE_CFG1(PIN48)
SWR MODE
Dual Mode Regulator Configuration
MODE_CFG0(PIN47)
10
Note:
0
3- Slave address should configure as 0xA8
2- EEPROM device should be 2-byte addressing device
1- EEPROM with a size 8K-Byte
: PIN47 4.7K pull high, PIN48 4.7K pull high
: PIN47 4.7K pull high, PIN48 4.7K pull low
: PIN47 4.7K pull low, PIN48 4.7K pull high
EEPROM MODE
Mode Configure Table(Power On Latch)
LDO MODE
EP Mode
ROM ONLY Mode
RTD2136 Supports three operation mode for system design.
ConnectNC
NCConnect
ROM ONLY MODE
Reserved 4.7K resistor pull up/low for mode selection
EEPROM Mode
EP MODE
0 Olm(R)2.2-uH(L)
LDO
SWR
Cap closed to PIN17
X
1. Cap should be closed to chip
6-19-41001-019
暞
暞暞
暞ẞ
ẞẞ
ẞ㔠
㔠㔠
㔠
:33pcs
80mils 80mils40mils 40mils
80mils
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
PIN48PIN47
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
LVDS
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
EDP
ᶲ
ᶲᶲ
ᶲẞ
ẞẞ
ẞ
BRIGHTNESS_EC_PS
DRX1p
DRX0n
DRX0p
DAUXp
DAUXn
LVDS-L0N
LVDS-LCLKP
LVDS-LCLKN
LVDS-L2P
LVDS-L2N
LVDS-L1P
LVDS-L1N
DRX1n
P_DDC_DATA
P_DDC_CLK
PANEL_PWM
LVDS-U0P
LVDS-U0N
LVDS-UCLKP
LVDS-UCLKN
LVDS-U2P
LVDS-U2N
LVDS-U1P
LVDS-U1N
LVDS-L0P
DRX0p
DRX1n
DRX1p
DAUXp
DAUXn
TEST_MODE
HPD
MODE_CFG0
MODE_CFG1
PIN17
DRX0n
PIN17 ENBLT
P_DDC_DATA
P_DDC_CLK
LVDS-LCLKN
LVDS-LCLKP
LVDS-L0N
LVDS-UCLKN
LVDS-UCLKP
LVDS-U2P
LVDS-U2N
LVDS-U1P
LVDS-U1N
LVDS-U0P
LVDS-U0N
PIN17
PANEL_PWM
LVDS-L2N
LVDS-L2P
LVDS-L1P
LVDS-L1N
LVDS-L0PLVDS-L0P
ENBLT
BRIGHTNESS_EC_PS
SMD_EDP_DAT
SMC_EDP_CLK
DP_REXT
HPD
MODE_CFG0
MODE_CFG1
3.3VS3.3VS DVCC33AVCC33
AVCC33
DVCC33 DVCC33
VCCK_V12
VCCK_V12
VCCK_V12
VCCK_V12
3.3VS 3.3VS
3.3VS3,4,5,6,7,13,14,15,16,17,19,20,22,23,24,25,26,27,32
EDP_TXN_13,16
EDP_TXN_03,16
EDP_AUXP3,16
EDP_AUXN3,16
EDP_TXP_03,16
EDP_TXP_13,16
LVDS-LCLKP 16
EDP_HPD3,16
LVDS-U2N 16
LVDS-LCLKN 16
LVDS-U2P 16
LVDS-U1N 16
LVDS-L2N 16
LVDS-U1P 16
LVDS-L2P 16
LVDS-L0N 16
LVDS-L1P 16
LVDS-L0P 16
LVDS-U0P 16
LVDS-UCLKP 16
LVDS-L1N 16
ENBLT 16
LVDS-U0N 16
LVDS-UCLKN 16
P_DDC_CLK 16
P_DDC_DATA 16
PANEL_PWM 16
EDP_BRIGHTNESS3
LVDS_PLVDD_EN 16
Title
Size Document Number Rev
Date: Sheet
of
6-71-N24J0-DB2
1.0
[18] RTD2136N (EDP to LVDS)
A3
18
42Tuesday, June 28, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number Rev
Date: Sheet
of
6-71-N24J0-DB2
1.0
[18] RTD2136N (EDP to LVDS)
A3
18
42Tuesday, June 28, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
Size Document Number Rev
Date: Sheet
of
6-71-N24J0-DB2
1.0
[18] RTD2136N (EDP to LVDS)
A3
18
42Tuesday, June 28, 2016
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C1627
*0.1u_10V_X7R_04
LVDS
L223
*BCNR3010C-2R2M
1 2
R1712
10K_04
C1624 *0.1u_10V_X7R_04
LVDS
R1717
*4.7K_04
R1702 *0_06
LVDS
C1623 *0.1u_10V_X7R_04
LVDS
RTD2136N
U150
*RTD2136N
LVDS
DP_HPD
1
TEST_MODE
2
AUX_CH_N
3
AUX_CH_P
4
DP_V33
5
DP_GND
6
LANE0_P
7
LANE0_N
8
LANE1_P
9
LANE1_N
10
DP_V12
11
DP_REXT
12
CIICSCL
13
CIICSDA
14
SWR_VCCK/LDO_VCCK
15
GND
16
SWR_LX/LDO_FB
17
SWR_VDD/LDO_VDD
18
PWMOUT
19
PANEL_VCC
20
PWMIN
21
PVCC
22
TXE3+
23
TXE3-
24
TXOC-
36
TXOC+
35
TXO3-
34
TXO3+
33
TXE0-
32
TXE0+
31
TXE1-
30
TXE1+
29
TXE2-
28
TXE2+
27
TXEC-
26
TXEC+
25
MODE_CFG1
48
MODE_CFG0
47
MIICSCL
46
MIICSDA
45
BL_EN
44
VCCK
43
TXO0-
42
TXO0+
41
TXO1-
40
TXO1+
39
TXO2-
38
TXO2+
37
EPAD_GND
49
R1713
*4.7K_04
C1633
*10u_6.3V_X5R_06
LVDS
R1714
*4.7K_04
LVDS
R1710 0_04
EDP
R1716
*4.7K_04
LVDS
C1634
*0.1u_10V_X7R_04
LVDS
C1631
*4.7u_6.3V_X5R_06
LVDS
R1711 *0_04
LVDS
R1715 *0_06
LVDS
C1616
*0.1u_10V_X7R_04
LVDS
C1632
*0.1u_10V_X7R_04
LVDS
C1622 *0.1u_10V_X7R_04
LVDS
C1621 *0.1u_10V_X7R_04
LVDS
C1625 *0.1u_10V_X7R_04
LVDS
C1620
*0.1u_10V_X7R_04
LVDS
R1704
*10K_04
LVDS
C1630
*0.1u_10V_X7R_04
LVDS
C1617
*2.2u_6.3V_X5R_04
LVDS
C1628
*0.1u_10V_X7R_04
LVDS
R1706 *100K_04
LVDS
R1707
*12K_1%_04
LVDS
R1703 *0_06
LVDS
C1626 *0.1u_10V_X7R_04
LVDS
R1705 *0_04
LVDS
C1619
*2.2u_6.3V_X5R_04
LVDS
C1618
*0.1u_10V_X7R_04
LVDS
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