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Clevo N950TP6 - Vcc_Core, VCCGT

Clevo N950TP6
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8
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5
5
4
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3
3
2
2
1
1
D D
C C
B B
A A
Droop 2.1 mV/A
Droop 3.1 mV/A
O.C.P 60A
DEFAULT
PUT COLSE
TO VCCGT
HOT SPOT
VCCGT VBOOT
SET AT 0V,
SVID
ADDRESS=01h
VCCGT
IMAX SET
AT 45A
PUT CLOSE
TO PWM
VCORE
IMAX SET
AT 133A
PUT CLOSE
TO VCORE
HOT SPOT
VCORE VBOOT
SET AT 0V,
SVID
ADDRESS=00h
6X6 52PIN QFN
BOTTOM PAD
CONNECT TO
GND Through
5 VIAs
Work F=
330kHz
Intel SKYLAKE IMVP8 POWER VCORE 3+1 PHASE
105 degree C
3+2
CONFIGURATION
PSYS
䚉慷性攳⸚㒦㸸炻㚫忈ㆸ䲣䴙ᶵ䨑
O.C.P 173A
D01A 1002
D01A 1002
D01A 1002
VCCST_VCCPLL
VIN5V
VCCST_VCCPLL
3.3VS
5V
3.3V
H_VIDSCK_VR [3]
PWM2 [55]
PWM1 [55]
CSN3 [55]
CSN2 [55]
CSN1 [55]
VCORE_PG[31]
H_VIDALERT #_VR [3]
PWM3 [55]
CSP2[55]
CSP1[55]
H_VIDSOUT_VR [3]
DRVON [55]
CSP3[55]
H_PROCHOT#[3]
CSP1A[55]
PWM1A [55]
CSN1A [55]
VCCCORE_SENSE[6]
VSSCORE_SENSE[6]
VCCGT_SENSE[6]
VSSGT_SENSE[6]
PSYS[57]
VIN[29,33,50,51,52,53,55,56,57,59,61]
3.3VS[8,9,23,26,27,28,29,30,32,33,34,35,36,37,40,41,44,45,46,47,48,49,50,59,60,61,62]
VCCSA[6,56]
5V[28,42,43,45,50,53,55,56,58,61,62]
VCORE[6,55]
VCCGT[6,55]
VCCST_VCCPLL[3,6,33,51]
3.3V[2,23,28,29,39,40,41,43,50,51,53,58,61]
ALL_SYS_PWRGD[29,31,48]
Title
Size Doc ument Number Rev
Date: Sheet
of
6-71-N9500-D01A
D01A
[54] VCC_CORE & VCCGT
Custom
54 68Friday, October 06, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Doc ument Number Rev
Date: S heet
of
6-71-N9500-D01A
D01A
[54] VCC_CORE & VCCGT
Custom
54 68Friday, October 06, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
Title
Size Doc ument Number Rev
Date: S heet
of
6-71-N9500-D01A
D01A
[54] VCC_CORE & VCCGT
Custom
54 68Friday, October 06, 2017
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SCHEMATIC1
PR549 *100K_1%_04
PR68
*1K_1%_04
PR554
100K_1%_04
PJ76
OPEN_4mil
12
PR74
20K_1%_04
PR569 0_04
PR61 150K_1%_04
PR409
10K_1%_04
PR383
100_04
PR559
26.1K_1%_04
PC370
*10u_6.3V_X5R_06
PC256 1000p_50V_X7R_04
PC285
*0.1u_10V_X7R_04
PR410
15.8K_1%_04
PC352 2200p_50V_X7R_04
PC286 *47p_50V_X7R_04
PC261 0.022u_50V_X7R_04
PR59 68K_1%_06
PC268
4.7u_6.3V_X5R_06
PC270
4700p_50V_X7R_04
PR572 10_04
PC266 47p_50V_NPO_04
PC259
470p_50V_X7R_04
PR54
35.7K_1%_04
PR69 20K_1%_04
PR50 1K_1%_04
PJ61
OPEN_4mil
12
PC353
0.01u_50V_X7R_04
PC350
1000p_50V_X7R_04
PR70 0_04
PR550
7.68K_1%_06
PR560
35.7K_1%_04
VCORE PORTION
VCCGT PORTION
PU19
NCP81203PMNTXG
CSP2
41
ROSC
8
VCC
7
FB
49
VRDY
6
SDIO
3
SCLK
5
COMP
48
VSP
51
PWM2
33
PWM1
34
CSP1
39
DIFF
50
VSN
52
TSENSE
37
CSP3
43
PWM3
32
CSP1A
25
PWM1A/ICCMAXA
30
CSN3
42
CSN1
38
CSN2
40
CSN1A
26
ALERT#
4
VRHOT
12
IOUT
1
IOUTA
13
DRVON
35
EPAD
53
VRMP
9
EN
2
VSPA
15
DIFFA
16
VSNA
14
COMPA
18
FBA
17
CSSUM
45
CSCOMP
47
ILIM
46
CSREF
44
CSSUMA
21
CSCOMPA
19
ILIMA
20
VBOOTA/ADDRA
27
TSENSEA
11
CSREFA
22
CSN2A
24
CSP2A
23
PWM2A
31
PH/FDm /FDa/SR/DDR
10
VBOOT/ADDR
28
PSYS
29
ICCMAX
36
PC269
0.1u_10V_X7R_04
PR404 86.6K_1%_06
PR58 1K_1%_04
PR570
100K_1%_04
PR66 10_04
PR577 47.5_1%_04
PR551 10_04
PR561 150K_1%_04
PR566
2.2_06
PC262
0.022u_50V_X7R_04
PR564
15K_1%_04
PC273
1000p_50V_X7R_04
NTC2
100k_1%_04_NTC
1 2
PR571
10K_04
PC265 470p_50V_X7R_04
PC354 47p_50V_NPO_04
NTC1
100k_1%_04_NTC
1 2
PR581
7.68K_1%_06
PC351 2200p_50V_X7R_04
PR396 1K_1%_04
PR411 2K_04
PR397
1K_1%_04
PR400
36.5K_1%_04
PR408
21K_1%_04
PR558 *100K_1%_04
PC348
470p_50V_X7R_04
PR567 49.9_1%_04
PC349
1000p_50V_X7R_04
PC271
4700p_50V_X7R_04
PR573 10_04
PR64
18.7K_1%_04
PR65
30K_1%_04
PR71 *100_04
PR399
10K_1%_04
PJ77
OPEN_4mil
12
PR402
45.3_1%_04
PR565
*45_04
PR406
10K_04
PR118 0_04
PR582
7.68K_1%_06
PR552 *100K_1%_04
PC267 *220p_50V_X7R_04
PR60
35.7K_1%_04
PC283
0.1u_10V_X7R_04
PC260 1000p_50V_X7R_04
PR76
9.31K_1%_04
PC258
1000p_50V_X7R_04
PJ78
OPEN_4mil
12
PC263
1u_6.3V_X5R_04
PR392 86.6K_1%_06
PR395 4.02K_1%_04
PR398
105K_1%_04
PR73
4.12K_1%_04
PR555 10_04
PR403 4.02K_1%_04
PR553 86.6K_1%_06
PJ79
OPEN_4mil
12
PR568
1K_06
PR72
4.12K_1%_04
PR75
9.31K_1%_04
PJ80
OPEN_4mil
12
PC277 0.022u_50V_X7R_04
PC257 0.022u_50V_X7R_04
PR401 1K_1%_04
PR583
7.68K_1%_06
PC264 470p_50V_X7R_04
PR405 47.5_1%_04
PC272 *220p_50V_X7R_04
PR556
*100K_1%_04
VR_ENABLE_NCP81203
CSP1
CSP2
IMAX
PROG
VBOOT/ADDR
CSN1
CSN2
CSN3
VBOOTA/ADDRA
CSN3
CSN1
PROG
VBOOT/ADDR
IMAX
CSN2
CSP1
CSP2
CSP3
CSP3
CSP1A
CSN1A
CSP1A
CSN1A
VBOOTA/ADDRA
PWM1A
VR_READY_NCP81203
Sheet 54 of 68
VCC_Core, VCCGT
Schematic Diagrams
VCC_Core, VCCGT B - 55
B.Schematic Diagrams
VCC_Core, VCCGT

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