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Clevo W150HRM - Sandy Bridge Processor 1;7

Clevo W150HRM
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Schematic Diagrams
Sandy Bridge Processor 1/7 B - 3
B.Schematic Diagrams
Sandy Bridge Processor 1/7
Sheet 2 of 49
Sandy Bridge
Processor 1/7
C 589 0. 22u_10V_X5R _04
C 608 0. 22u_10V_X5R _04
C 598 0. 22u_10V_X5R _04
C 606 0. 22u_10V_X5R _04
C 591 0. 22u_10V_X5R _04
C67 2
0.1u_10V_X7R _04
R51 9
24.9_1% _04
C 596 0. 22u_10V_X5R _04
C 594 0. 22u_10V_X5R _04
R521
1K_1%_04
C 601 0. 22u_10V_X5R _04
Q27
G711ST9U
OUT
1
VC C
2
GND
3
C67 3
0.1u_10V_X7R _04
R133 24.9_1% _04
1.05V S_VTT
3.3V
DMI_TXP120
DMI_TXP020
1. 05 V S _V TT 1.05VS_VTT
DM I_TXN020
DMI_TXP320
DMI_TXP220
DM I_TXN320
DM I_TXN220
DM I_TXN120
DM I_ RXN 220
DM I_ RXN 120
DM I_ RXN 020
SC70-5 & SC70-3
Co-lay
DM I_ RXP220
DM I_ RXP120
DM I_ RXP020
DM I_ RXN 320
FD I_FSYN C 120
FD I_FSYN C 020
DM I_ RXP320
FD I_LS YN C120
FD I_LS YN C020
FD I_ INT20
FDI_TXN220
FDI_TXN120
FDI_TXN020
FDI_TXN520
FDI_TXN420
FDI_TXN320
FDI_TXP120
FDI_TXP020
FDI_TXN720
FDI_TXN620
FDI_TXP420
FDI_TXP320
FDI_TXP220
FDI_TXP720
FDI_TXP620
FDI_TXP520
C 604 0. 22u_10V_X5R _04
3.3V3,8, 11,12,16,18, 19,20,22,23, 24,25,27,28, 29,30,33,35, 37,38,39
H15
H8_0D4_4
PE G_R X#4 12
PE G_R X#2 12
THER M _V OLT 34
H8
H8_0D4_4
H16
H8_0D4_4
PE G_R X#0 12
PE G_R X#3 12
PE G_R X#7 12
PE G_R X#1 12
CPU
PE G_R X7 12
PE G_R X#5 12
PE G_R X#6 12
PE G_R X2 12
PE G_R X4 12
PE G_R X5 12
PE G_R X6 12
PE G_R X0 12
PE G_R X3 12
PE G_TX#2 12
PE G_TX#3 12
PE G_R X1 12
PE G_TX#1 12
PE G_TX#0 12
PE G_TX#7 12
PE G_TX#5 12
PE G_TX6 12
PE G_TX#4 12
PE G_TX#6 12
PE G_TX4 12
PE G_TX0 12
PE G_TX3 12
PE G_TX5 12
PE G_TX1 12
PE G_TX7 12
1.05V S_VTT3,5,23,24, 25,35,39
PE G_TX2 12
EDP_H PD
EDP_C OM PIO
Q26
*TMP20
NC
1
GN D
2
VO
3
GND
5
VC C
4
C 595 0. 22u_10V_X5R _04
8/30
C 607 0. 22u_10V_X5R _04
CAD NOTE: PEG_ICOMPI and RCOMPO signals
should be shorted and routed with
- max length = 500 mils
- typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with
- max length = 500 mils
- typical impedance = 14.5 mohms
DP_TXP_111
DP_TXP_011
DP_TXP_211
DP_TXN_011
DP_TXN_111
DP_TXN_211
DP_AU X_P11
DP_AU X_N11
C 597 0. 22u_10V_X5R _04
EDP HPD Function Disable
EDP_HPD: Pull-up10K- DISABLED HPD
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
U49A
PZ98827- 364B-01F
DM I_ RX# [0 ]
B27
DM I_ RX# [1 ]
B25
DM I_ RX# [2 ]
A25
DM I_ RX# [3 ]
B24
DM I_ RX[0 ]
B28
DM I_ RX[1 ]
B26
DM I_ RX[2 ]
A24
DM I_ RX[3 ]
B23
DM I_TX#[0]
G21
DM I_TX#[1]
E22
DM I_TX#[2]
F21
DM I_TX#[3]
D21
DM I_ TX[ 0]
G22
DM I_ TX[ 1]
D22
DM I_ TX[ 3]
C21
DM I_ TX[ 2]
F20
FD I0_T X# [0 ]
A21
FD I0_T X# [1 ]
H19
FD I0_T X# [2 ]
E19
FD I0_T X# [3 ]
F18
FD I1_T X# [0 ]
B21
FD I1_T X# [1 ]
C20
FD I1_T X# [2 ]
D18
FD I1_T X# [3 ]
E17
FD I0_TX[0]
A22
FD I0_TX[1]
G19
FD I0_TX[2]
E20
FD I0_TX[3]
G18
FD I1_TX[0]
B20
FD I1_TX[1]
C19
FD I1_TX[2]
D19
FD I1_TX[3]
F17
FD I0_FS YN C
J18
FD I1_FS YN C
J17
FD I_I NT
H20
FD I0_LSY NC
J19
FD I1_LSY NC
H17
PEG _ICO MP I
J22
PEG_ICOMPO
J21
PEG _RC OM PO
H22
PEG _RX#[0]
K33
PEG _RX#[1]
M35
PEG _RX#[2]
L34
PEG _RX#[3]
J35
PEG _RX#[4]
J32
PEG _RX#[5]
H34
PEG _RX#[6]
H31
PEG _RX#[7]
G33
PEG _RX#[8]
G30
PEG _RX#[9]
F35
PEG _RX#[10]
E34
PEG _RX#[11]
E32
PEG _RX#[12]
D33
PEG _RX#[13]
D31
PEG _RX#[14]
B33
PEG _RX#[15]
C32
PEG _R X[0]
J33
PEG _R X[1]
L35
PEG _R X[2]
K34
PEG _R X[3]
H35
PEG _R X[4]
H32
PEG _R X[5]
G34
PEG _R X[6]
G31
PEG _R X[7]
F33
PEG _R X[8]
F30
PEG _R X[9]
E35
PEG _RX[10]
E33
PEG _RX[11]
F32
PEG _RX[12]
D34
PEG _RX[13]
E31
PEG _RX[14]
C33
PEG _RX[15]
B32
PEG_TX# [0]
M29
PEG_TX# [1]
M32
PEG_TX# [2]
M31
PEG_TX# [3]
L32
PEG_TX# [4]
L29
PEG_TX# [5]
K31
PEG_TX# [6]
K28
PEG_TX# [7]
J30
PEG_TX# [8]
J28
PEG_TX# [9]
H29
PEG _TX#[10]
G27
PEG _TX#[11]
E29
PEG _TX#[12]
F27
PEG _TX#[13]
D28
PEG _TX#[14]
F26
PEG _TX#[15]
E25
PEG_TX[0]
M28
PEG_TX[1]
M33
PEG_TX[2]
M30
PEG_TX[3]
L31
PEG_TX[4]
L28
PEG_TX[5]
K30
PEG_TX[6]
K27
PEG_TX[7]
J29
PEG_TX[8]
J27
PEG_TX[9]
H28
PEG_TX[10 ]
G28
PEG_TX[11 ]
E28
PEG_TX[12 ]
F28
PEG_TX[13 ]
D27
PEG_TX[14 ]
E26
PEG_TX[15 ]
D25
eDP_AU X
C15
eDP_AU X#
D15
eDP_TX[0]
C17
eDP_TX[1]
F16
eDP_TX[2]
C16
eDP_TX[3]
G15
eDP_TX#[0]
C18
eDP_TX#[1]
E16
eDP_TX#[2]
D16
eDP_TX#[3]
F15
eDP_C OM PIO
A18
eDP_H PD
B16
eDP_IC OM PO
A17
CAD NOTE: DP_COMPIO and ICOMPO signals
should be shorted near balls and routed with
- typical impedance < 25 mohms
PE G_TX#_6
PE G_TX#_2
PE G_TX#_5
PE G_TX#_7
PE G_TX#_3
PE G_TX#_0
PE G_TX#_1
PE G_TX#_4
DP Compensation Signal
PEG_IRCOMP_R
C 587 0. 22u_10V_X5R _04
C 588 0. 22u_10V_X5R _04
20 mil
Sandy Bridge Processor 1/7 ( DMI,PEG,FDI )
3
2
1
1 : 2 (4 mi ls : 8m il s)
PLACE NEAR U3
C 602 0. 22u_10V_X5R _04
PE G_TX_0
PE G_TX_6
PE G_TX_4
PE G_TX_2
PE G_TX_1
PE G_TX_5
PE G_TX_3
PE G_TX_7
PEG Compensation Signal
C 593 0. 22u_10V_X5R _04

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