Cmsemicon SC8F577 Series - Reset Status

V1.8
SC8F577x
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2.5 Program Status Register (STATUS)
STATUS register includes:
◆ status of ALU.
◆ Reset status.
◆ Selection bit of Data memory (GPR and SFR)
Just like other registers, STATUS register can be the target register of any other instruction. If an
instruction that affects Z, DC or C bit that use STATUS as target register, then it cannot write on these 3 status
bits. These bits are cleared or set to 1 according to device logic. TO and PD bit also cannot be written. Hence
the instructions which use STATUS as target instruction may not result in what is predicted.
For example, CLRSTATUS will clear higher 3 bits and set the Z bit to 1. Hence the value of STATUS will
be 000u u1uu (u will not change.). Hence, it is recommended to only use CLRB, SETB, SWAPA and SWAPR
instructions to change STATUS register because these will not affect any status bits.
program status register STATUS (03H)
03H
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
Read/write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset value
0
0
0
1
1
X
X
X
Bit7
IRP:
1=
0=
Selection bit of register memory (for indirect addressing)
Bank2 and Bank3 (100h-1FFh)；
Bank0 and Bank1 (00h-FFh).
Bit6~Bit5
RP [1:0]:
Selection bit of memory；
00:
Select Bank 0；
01:
Select Bank 1；
10:
Select Bank 2；
11:
Select Bank 3.
Bit4
TO:
1=
0=
Time out bit；
Power on or CLRWDT instructions or STOP instructions；
WDT time out.
Bit3
PD:
1=
0=
Power down；
Power on or CLRWDT instructions；
STOP instructions.
Bit2
Z:
1=
0=
Bit for result in zero；
Result is 0；
Result is not 0
Bit1
DC:
1=
0=
Carry bit；
When carry happens to higher bits or no borrow happens in Lower 4 bits in the result；
When no carry happens to higher bits or borrow happens in Lower 4 bits in the result.
Bit0
C:
1=
0=
Carry/borrow bit ；
When carry happens at the highest bit or no borrow happens；
When no carry happens at the highest bit or borrow happens