2.8 Watchdog Timer (WDT)
Watchdog timer is a self-oscillated RC oscillation timer. There is no need for any external devices. Even
the main clock of the chip stops working, WDT can still function/ WDT overflow will cause reset.
2.8.1 WDT Period
WDT and TIMER0 share 8-bit pre-scaler. After all resets, default overflow period of WDT is 128ms. The
way to calculate WDT overflow is 18ms*frequency division coefficient. If WDT period needs to be changed,
you can configure OPTION_REG register. The overflow period is affected by environmental temperature,
voltage of the power source and other parameter.
“CLRWDT”and“STOP”instructions will clear counting value inside the WDT timer and pre-scaler (when
pre-scaler is allocated to WDT). WDT generally is used to prevent the system and MCU program from being
out of control. Under normal condition, WDT should be cleared by“CLRWDT”instructions before overflow to
prevent reset being generated. If program is out of control for some reason such that “CLRWDT”instructions
is not able to execute before overflow, WDT overflow will then generate reset to make sure the system restarts.
If reset is generated by WDT overflow, then ‘TO’ bit of STATUS will be cleared to 0. User can judge whether
the reset is caused by WDT overflow according to this.
Note:
1) If WDT is used, ‘CLRWDT’ instructions must be placed somewhere is the program to make sure it is
cleared before WDT overflow. If not, chip will keep resetting and the system cannot function normally.
2) It is not allowed to clear WDT during interrupt so that the main program ‘run away’ can be detected.
3) There should be 1 clear WDT in the main program. Try not to clear WDT inside the sub program, so
that the protection feature of watchdog timer can be used largely.
4) Different chips have slightly different overflow time in watchdog timer. When setting clear time for
WDT, try to leave extra time for WDT overflow time so that unnecessary WDT reset can be avoided.
Note:
1. SWDTEN located in OSCCON register Bit1.
2. if WDT configuration bit in CONFIG equals 1, then WDT is always enabled and is unrelated to the status
of control bit of SWDTEN. if WDT configuration bit in CONFIG equals 0, then it is able to disable WDT
using the control bit of SWDTEN.
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