6.3.4 PORTB Pull up Resistance
Each PORTB pin has an internal weak pull up that can be individually configured. The control bits
WPUB<7:0> enable or disable each weak pull up.
PORTB pull up resistance register WPUB (08H)
6.3.5 PORTB Level Change Interrupt
All PORTB pins can be individually configured as level change interrupt pins. The control bit IOCB<7:0>
allows or disables the interrupt function of each pin. Disable pin level change interrupt function when power
on reset.
For the pin that has allowed level change interrupt, compare the value on the pin with the old value
latched when PORTB was read last time. Perform a logical OR operation with the output "mismatch" of the
last read operation to set the PORTB level change interrupt flag (RBIF) in the INTCON register as 1.
This interrupt can wake up the device from sleep mode, and the user can clear the interrupt in the interrupt
service program in the following ways:
-Read or write to PORTB. This will end the mismatch state of the pin level.
-Clear the flag bit RBIF.
The mismatch status will continuously set the RBIF flag bit as 1. Reading or writing PORTB will end the
mismatch state and allow the RBIF flag to be cleared. The latch will keep the last read value from the under
voltage reset. After reset, if the mismatch still exists, the RBIF flag will continue to be set as 1.
Note: If the level of the I/O pin changes during the read operation (beginning of the Q2 cycle), the
RBIF interrupt flag bit will not be set as 1. In addition, since reading or writing to a port affects all
bits of the port, special care must be taken when using multiple pins in interrupt-on-change
mode. When dealing with the level change of one pin, you may not notice the level change on
the other pin.
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