Cmsemicon SC8F577 Series - Page 82

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SC8F577x
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AD data register high bit ADRESH (9EH), ADFM=1
9EH
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
ADRESH
----
----
----
----
----
----
ADRES11
ADRES10
read/write
----
----
----
----
----
----
R
R
Reset
value
----
----
----
----
----
----
X
X
Bit7~Bit2
Not used.
Bit1~Bit0
ADRES<11:10>:
ADC result register bit.
The higher 2 bits of the 12-bit conversion result.
AD data register lower bits ADRESL (9FH), ADFM=1
9FH
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
ADRESL
ADRES9
ADRES8
ADRES7
ADRES6
ADRES5
ADRES4
ADRES3
ADRES2
read/write
R
R
R
R
R
R
R
R
Reset
value
X
X
X
X
X
X
X
X
Bit7~Bit0
ADRES<9:2>:
ADC result register bit.
The 2-9 bits of the 12-bit conversion result.
Note: In the case of ADFM=1, the AD conversion result only saves the upper 10 bits of the 12-bit result,
where ADRESH saves the upper 2 bits, and ADRESL saves the 2nd to 9th digits.