Cmsemicon SC8F577 Series - Page 9

V1.8
SC8F577x
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1.2 System Structure Diagram
4096×16
Program Memory
Instruction Reg
Instruction Decode
and Control
Timing Generation
PC
Stack1
..
Stack8
256×8
Data Memory
Addr Mux
Fsr Reg
ACCMux
ALU
VDD,GND
AD Converter
TIMER0
TIMER2
I/O PORT
PWM0-4
Pro EE
Device Reset Timer
Power-on Reset
Watch Dog Timer
OSC
SPI
USART
LVD
IIC
COMP
Pro EE