Denon DRA-100 - Page 39

Waveform
Fig.1 CY920[CN1301] out DSD Digital Audio data waveform Fig.2 CY920[CN1301] out PCM Digital Audio data waveform
Fig.3 FPGA[IC1501] - CSRA6601[IC1701] Digital Audio data
waveform
Fig.4 EEPROM[IC1203] - SYS-ucom[IC1201] Communication
Waveform
Fig.5 TOUCH SENS[IC301] - SYS-ucom[IC1201] Communica-
tion Waveform
Fig.6 CSRA6601[IC1701] - SYS-ucom[IC1201] Communica-
tion Waveform
q
CN1301 : 30pin
NET/USB_BCK
w
CN1301 : 34pin
NET/USB_PCM_
DATA/DSDL
e
CN1301 : 32pin
NET/USB_DSDR
r
CN1301 : 26pin
NET/USB_MCK
t
CN1301 : 30pin
NET/USB_BCK
y
CN1301 : 28pin
NET/USB_LRCK
u
CN1301 : 34pin
NET/USB_PCM_
DATA/DSDL
i
FPC1602 : 4pin
FPGA_BCK
o
FPC1602 : 2pin
FPGA_LRCK
Q0
FPC1602 : 3pin
FPGA_DATA
Q1
IC1203 : 6pin
EEPROM_SCL
Q2
IC1203 : 5pin
EEPROM_SDA
Q3
IC1201 : 38pin
TOUCH_SCL
Q4
IC1201 : 40pin
TOUCH_SDA
Q5
FPC1601 : 2pin
CSR_SPI_CLK
Q6
FPC1601 : 3pin
CSR_SPI_CS
Q7
FPC1601 : 4pin
CSR_SPI_DI
39