DFI CH960-CM246 - Page 18

www.dfi .comChapter 3 Hardware Installation
18
Chapter 3
Signal Pin# Pin Type Pwr Rail /Tolerance CH960 PU/PD Module Base Specification R2.1 Description COM Express Carrier Design Guide R2.0 Description
PEG Si
g
nals Descri
p
tion
s
PEG_TX6+ D71 AC Coupling capacitor
PEG_TX6- D72 AC Coupling capacitor
PEG_RX6+ C71
PEG_RX6- C72
PEG_TX7+ D74 AC Coupling capacitor
PEG_TX7- D75 AC Coupling capacitor
PEG_RX7+ C74
PEG_RX7- C75
PEG_TX8+ D78 AC Coupling capacitor
PEG_TX8- D79 AC Coupling capacitor
PEG_RX8+ C78
PEG_RX8- C79
PEG_TX9+ D81 AC Coupling capacitor
PEG_TX9- D82 AC Coupling capacitor
PEG_RX9+ C81
PEG_RX9- C82
PEG_TX10+ D85 AC Coupling capacitor
PEG_TX10- D86 AC Coupling capacitor
PEG_RX10+ C85
PEG_RX10- C86
PEG_TX11+ D88 AC Coupling capacitor
PEG_TX11- D89 AC Coupling capacitor
PEG_RX11+ C88
PEG_RX11- C89
PEG_TX12+ D91 AC Coupling capacitor
PEG_TX12- D92 AC Coupling capacitor
PEG_RX12+ C91
PEG_RX12- C92
PEG_TX13+ D94 AC Coupling capacitor
PEG_TX13- D95 AC Coupling capacitor
PEG_RX13+ C94
PEG_RX13- C95
PEG_TX14+ D98 AC Coupling capacitor
PEG_TX14- D99 AC Coupling capacitor
PEG_RX14+ C98
PEG_RX14- C99
PEG_TX15+ D101 AC Coupling capacitor
PEG_TX15- D102 AC Coupling capacitor
PEG_RX15+ C101
PEG_RX15- C102
PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V PU 10Kɏ
to 3V3
PCI Ex
p
ress Gra
p
hics lane reversal in
p
ut stra
p
.
Pull low on the Carrier board to reverse lane order.
PCI Ex
p
ress Gra
p
hics lane reversal in
p
ut stra
p
.
Pull low on the carrier board to reverse lane order.
Signal Pin# Pin Type Pwr Rail /Tolerance CH960 PU/PD Module Base Specification R2.1 Description COM Express Carrier Design Guide R2.0 Description
EXCD0_CPPE# A49 I CMOS 3.3V /3.3V PU 10k to 3.3V
PCI Ex
p
ressCard: PCI Ex
p
ress ca
p
able card re
q
uest, active low, one
p
er
card
PCI Ex
p
ressCard0: PCI Ex
p
ress ca
p
able card re
q
uest, active low,
one
p
er card
EXCD0_PERST#
A
48 O CMO
S
3.3V
/
3.3V PCI Ex
p
ressCard: reset
,
active low
,
one
p
er card PCI Ex
p
ressCard0: reset
,
active low
,
one
p
er card
EXCD1_CPPE# B48 I CMOS 3.3V /3.3V PU 10k to 3.3V PCI ExpressCard: PCI Express capable card request, active low, one percard
PCI Ex
p
ressCard1: PCI Ex
p
ress ca
p
able card re
q
uest, active low,
one
p
er card
EXCD1_PERST# B47 O CMO
S
3.3V
/
3.3V PCI Ex
p
ressCard: reset
,
active low
,
one
p
er card PCI Ex
p
ressCard1: reset
,
active low
,
one
p
er card
Signal Pin# Pin Type Pwr Rail /Tolerance CH960 PU/PD Module Base Specification R2.1 Description COM Express Carrier Design Guide R2.0 Description
USB0+ A46 USB Port 0, data + or D+
USB0- A45 USB Port 0, data - or D-
USB1+ B46 USB Port 1, data + or D+
USB1- B45 USB Port 1, data - or D-
I PCIE
PEG channel 15, Transmit Output differential pair.
PCI Express Graphics transmit differential pairs 12
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 11
PEG channel 15, Receive Input differential pair.
I PCIE AC coupled off Module
O PCIE AC coupled on Module
I/O USB
PEG channel 12, Transmit Output differential pair.
3.3V Suspend/3.3V USB differential pairs, channel 1
I PCIE AC coupled off Module
PCI Express Graphics receive differential pairs 14
PCI Express Graphics receive differential pairs 12
Ex
p
ressCard Si
g
nals Descri
p
tion
s
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15
PEG channel 12, Receive Input differential pair.
PEG channel 13 Transmit Output differential pair.
PEG channel 13, Receive Input differential pair.
USB Si
g
nals Descri
p
tion
s
I/O USB 3.3V Suspend/3.3V USB differential pairs, channel 0
PEG channel 14, Transmit Output differential pair.
PEG channel 14, Receive Input differential pair.
PEG channel 9, Transmit Output differential pair.
PEG channel 9, Receive Input differential pair.
PEG channel 10, Transmit Output differential pair.O PCIE AC coupled on Module
PCI Express Graphics receive differential pairs 13
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15
I PCIE AC coupled off Module
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13
AC coupled off Module
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 11
PCI Express Graphics receive differential pairs 10 PEG channel 10, Receive Input differential pair.
PEG channel 11, Transmit Output differential pair.
PEG channel 11, Receive Input differential pair.
O PCIE
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 6
PCI Express Graphics transmit differential pairs 10
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 9
O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 9
PEG channel 6, Transmit Output differential pair.
PEG channel 6, Receive Input differential pair.
PEG channel 7, Transmit Output differential pair.
PEG channel 7, Receive Input differential pair.
PEG channel 8, Transmit Output differential pair.O PCIE AC coupled on Module
PCI Express Graphics receive differential pairs 8
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 7
AC coupled on Module PCI Express Graphics transmit differential pairs 7
I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 6
PEG channel 8, Receive Input differential pair.I PCIE AC coupled off Module
PCI Express Graphics transmit differential pairs 8