2. Schematic Checklist and PCB Layout Design
Figure 16: ESP32 Crystal Oscillator Layout
2.2.1.5 RF
• Four-layer PCB design
In a four-layer PCB design, the RF trace is routed as shown highlighted in pink in Figure 17. The characteristic
RF impedance must be 50 Ω. The ground plane on the adjacent layer needs to be complete. Make sure to
keep the width of the RF trace consistent, and do not branch the trace. The RF trace should be as short as
possible with dense ground via stitching around it for isolation.
However, there should be no vias for the RF trace. The RF trace should be routed at a 135° angle, or with
circular arcs if trace bends are required.
π-type matching circuitry should be reserved on the RF trace and placed close to the chip.
No high-frequency signal traces should be routed close to the RF trace. The RF antenna should be placed
away from high-frequency transmitting devices, such as crystal oscillators, DDR, and clocks (SDIO_CLK),
etc.
In addition, the USB port, USB to UART chip, UART signal lines (including traces, vias, test points, header
pins, etc.) must be as far away from the antenna as possible. It is good practice to add ground vias around
the UART signal line. It is recommended that the design of PCB onboard antenna be based on Espressif’s
Type-B antenna.
• Two-layer PCB design
In a two-layer PCB design, the RF trace is routed as shown highlighted in pink in Figure 18. The width of the
RF trace should be greater than that of the RF trace in a four-layer board and is normally over 20 mil. The
actual width depends on the impedance formula where impedance-relevant parameters may vary depending
on the number of PCB layers.
Other good practices for routing RF traces in four-layer PCB designs still apply to two-layer board designs.
Espressif Systems 13 ESP32 Hardware Design Guidelines V2.7
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