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FATEK FBs-CB2 - MBWR MATRIX BIT WRITE (FUN127 MBWR)

FATEK FBs-CB2
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Advanced Function Instruction
7-110
FUN127 P
MBWR
MATRIX BIT WRITE
FUN127 P
MBWR
Md :
EN
Write control
Ladder symbol
127P.MBWR
END Write to end
Write-in bit INB
Pointer increment
CLR
L :
Pr :
ERR Pointer error
INC
Pointer clear
Md : Starting register of matrix
L : Matrix length
Pr : Pointer register
Md may combine with V, Z, P0~P9 to serve
indirect address application
W
Y
WM WS TMR CTR HR OR SR ROR DR K
XR
Range
Ope-
rand
WY0
WY240
WM0
WM1896
WS0
WS984
T0
T255
C0
C255
R0
R3839
R3904
R3967
R3968
R4167
R5000
R8071
D0
D4095
2
256
VZ
P0~P9
Md
L *
Pr * *
z When write control "EN" = 1 or "EN" ( P instruction) has a
transition from 0 to 1, the status of the write-in bit "INB" will be
written into the bit Mdpr pointed by pointer Pr within matrix Md.
Before the write-in takes place, the status of pointer clear "CLR"
will be checked. If "CLR" is 1, then Pr will be cleared to 0 before
the write-in action. After the write-in action has been completed,
the Pr value will be checked again. If the Pr value has already
reached 16L-1 (last bit), then the write-to-end flag will be set to
1. If the Pr value is less than 16L-1 and "INC" is 1, then the
pointer will increased by 1. Besides this, pointer clear "CLR" can
execute independently, and is not affected by other input.
L
Pr
Mspr
Ms
OTB
z The effective range of Pr is 0 to 16L-1. Beyond this range, the pointer error flag "ERR" will be set to 1, and
this instruction will not be carried out.
X0
EN
END
L :
Pr :
INB
ERR
5
R 20
Ms :
R 0
INC
CLR
X1
127P.MBWR
z In the program at left, pointer will be increased each time
execution (because "INC" is 1). As shown in the diagram
below, when X0 has a transition from 01, the status of
INB (X1) will be written into the Mdpr (Md
78
) position, and
pointer Pr will increased by 1 (changing to 79). In this
case, although Pr is pointing to the end, it has not yet
been written into Md
79
, so "END" flag is still 0. Only the
next attempt to write to Md
79
will set “END” to 1.
X1 Pr
Pr EN
1
R20
78
R20
79
0
Md15
Md
Md0
Md15
Md
Md0
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R4 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Md79
Md64
X0=
Ö
Md79
Md64
Before execution After execution

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