Faytech FAY-002 - Chapter 4 Block diagram R1.05; 4.1 Block diagram R1.05

4-1
Chapter 4: Block diagram R1.05
Chapter 4
Block diagram R1.05
4.1 Block diagram R1.05
HNUSB 2.0x4
J1900
KB/MS
Integrated
Clock Gen.
TPM
DDR3 1333
4 ports at mid-board
USB 2.0
4 x RS-232/422/485
at
back IO supports
(COM1)5V/12V
SPI FLASH 64Mbit
HNUSB 2.0x4
HUB
RJ45 Connector
SYSTEM
FAN
MINI CARD(Full / Half size)
HNUSB 2.0x1
LPC BUS
DDI0
CH7511B-BF
Audio
ALC887
back panel
PCIE x1
Option
SLB9635TT
Optional(mSATA)
10/100/1000
USB 2.0 x 1
MINI CARD+mSATA (W/
SIM card)1 x Full / Half size
with mSATA
optional by
jumper
USB 2.0
RGB
64-bit Dual-Channel Memory (SO-DIMM) x1 Slots
PCIE x1
USB4604-HN
SPDIF Output
+ SPEAK
5X2 BOX
HEADER K4
Integrated
PCH
RTL8111G
DP Port
SPI
HDA
PCIE x1
2 port for mini card
1 x PCIe x1 straddle type
HNUSB 2.0x1
HNUSB 2.0x1
SATA2.0
USB 3.0
SIO
Dual LVDS
USB 2.0 x 1
VGA Internal Connector
PCIE x1
USB 2.0 X2
Option
Option
Intel
Line-out / Mic-In
2x5 BOX Header
K8
RTL8111G
SIM card
connector 5x2
BOX Header
2 ports for back panel
1 x 5V/12V
SATA
power
connector
HUB
USB4604-HN
CH0
SATA2.0x2
RJ45 Connector
DIO
8-BIT
USB 3.0x1
PCIE x1
2 x Serial ATA
3Gb/s ( one
SATA colay
with mSATA)
eDP1
HW Montior
LVDS
Fintek F81866D
USB 2.0 X2 port
(back panel)
AMP_EUA2012AJIR1
Option
Watch dog
PCIE x1
24MHz
10/100/1000