FLIR Lepton 1.6 - The Information Contained Herein Does Not Contain Technology as Defined by the EAR, 15 CFR 772, Is Publicly Available

FLIR LEPTON® Engineering Datasheet
The information contained herein does not contain technology as defined by the EAR, 15 CFR 772, is publicly available,
and therefore, not subject to EAR. NSR (6/14/2018).
Information on this page is subject to change without notice.
Lepton Engineering Datasheet, Document Number: 500-0659-00-09 Rev: 203
75
Table 15 - Lepton Camera Module Pin Descriptions (cont.)
Pin #
Pin Name
Signal
Type
Signal Level
Description
16
VDDIO
Power
2.8 V — 3.1 V
Supply used for System IO
17
VPROG
—
—
See section 2.8.
19
VDD
Power
2.8V
Supply for Sensor (2.8V +/- 3%).
21
SCL
IN
VDDIO
Camera Control Interface Clock, I2C
compatible
(see Command and Control
Interface, page 40)
22
SDA
IN/OUT
VDDIO
Camera Control Interface Data, I2C
compatible
(see Command and Control
Interface, page 40)
23
PWR_DWN_L
IN
VDDIO
This active low signal shuts down the camera
24
RESET_L
IN
VDDIO
This active low signal resets the camera
26
MASTER_CLK
IN
VDDIO
ASIC Master Clock Input (see Master Clock,
page 15)
28
RESERVED
29
RESERVED
31
RESERVED
32
RESERVED