Remote Operation
FLUKE 8842A Emulation Mode
93
The SRQ Mask
The SRQ mask is a two-digit integer that specifies which conditions will generate a
service request. The SRQ mask is entered using the P1 command and can be read with
the G1 command. The conditions corresponding to each SRQ mask value are listed
under G1 in Table 30.
The SRQ mask can enable any combination of serial poll register bits 1 through 6. Its six-
bit binary representation is ANDed bit-for-bit with serial poll register bits 1 through 6
whenever the output buffer is loaded. If any mask-enabled bit in the serial poll register
comes true, the RQS bit (bit 7) is set true, generating a service request.
Example Explanation
“N32 P1” An SRQ is generated if an error is generated. The string
sets the SRQ mask to 32, which is 100000 in binary.
This mask is ANDed with the lower six bits of the
serial poll register. The mask thus enables bit 6, the
Any Error bit.
The SRQ mask codes can be added to select combinations of conditions.
Example Explanation
“N33 P1” An SRQ is generated if an error is generated or if the
trigger results in a overrange reading. The SRQ mask is
set to 33, which is 100001 in binary.
At power-up or on any device-clear command, the SRQ mask is set to 00 (decimal). This
prevents service requests by holding the RQS bit false under all conditions. For other
examples of the SRQ mask, see the description of the P1 command.
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