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HANYOUNG NUX ML-D Series - Page 23

HANYOUNG NUX ML-D Series
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21
Before staring Installation Operation Specifications
Register
address (HEX)
Symbol
Description
Property
(R/W)
Setting range Unit
Initial
value
CH1 CH2
n : Number
of channel
47(2F)
R/S_SAVE
Power outage recovery
setting
R/W
0: NO run return
1: run return
ABS 1
48(30)
PARA_INIT
Run parameter initialization
R/W 1: Parameter initialization ABS 0
61(3D) 62(3E)
EVSTS
Event channel by
channel, 1~8 status
R
All events OR running
7 Bit(128): Set “1” at event channel 8 occurrence
6 Bit(64): Set “1” at event channel 7 occurrence
5 Bit(32): Set “1” at event channel 6 occurrence
4 Bit(16): Set “1” at event channel 5 occurrence
3 Bit(8): Set “1” at event channel 4 occurrence
2 Bit(4): Set “1” at event channel 3 occurrence
1 Bit(2): Set “1” at event channel 2 occurrence
0 Bit(1): Set “1” at event channel 1 occurrence
ABS -
66(42)
EV.1STS
Event channel 1, channel
1~4 status
R
All events OR run
1 Bit(2): Set “1” at CH2 event occurrence
0 Bit(1): Set “1” at CH1 event occurrence
ABS -
67(43) EV.2STS
Event channel 2, channel
1~4 status
R
68(44) EV.3STS
Event channel 3, channel
1~4 status
R
69(45) EV.4STS
Event channel 4, channel
1~4 status
R
70(46) EV.5STS
Event channel 5, channel
1~4 status
R
71(47) EV.6STS
Event channel 6, channel
1~4 status
R
72(48) EV.7STS
Event channel 7, channel
1~4 status
R
73(49) EV.8STS
Event channel 8, channel
1~4 status
R
76(4C) EVBUS.1
Event bus 1 output setting
R/W
Set corresponding event bus output option at
event occurrence
0: output (OFF)
1: output (ON)
ABS 0
77(4D) EVBUS.2
Event bus 2 output setting
R/W
78(4E) EVBUS.3
Event bus 3 output setting
R/W
79(4F) EVBUS.4
Event bus 4 output setting
R/W
80(50) EVBUS.5
Event bus 5 output setting
R/W
81(51) EVBUS.6
Event bus 6 output setting
R/W
82(52) EVBUS.7
Event bus 7 output setting
R/W
83(53) EVBUS.8
Event bus 8 output setting
R/W
86(56) PRS Communication protocol R/W
0 : PC-LINK
1 : PC-LINK with SUM
2 : Modbus ASCII
3 : Modbus RTU
ABS
0
(PC-
LINK)
87(57) BPS Transmission speed R/W
0 : 9600 bps
1 : 19200 bps
2 : 38400 bps
3 : 57600 bps
4 : 76800 bps
ABS
0
(9600
bps)
88(58) PRI Parity bit R/W
0 : NONE
1 : ODD
2 : EVEN
ABS
2
(EVEN)
89(59) STP Stop bit R/W
1 : 1 Bit
2 : 2 Bit
ABS 1 (1 Bit)
90(5A) DLN Data length R/W
7 : 7 Bit
8 : 8 Bit
ABS 8 (8 Bit)
91(5B) RPT
Communication response
delay
R/W
0~10 delay time= process time
(maximum 25ms) +RTP X 10ms
ABS 0
95(5F) ADDR
Communication setup
Address
R 1 ~ 32 ABS -
96(60) MAX_CH Number of channels R 2 : 2 Channel ABS -

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