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Holtek HT48R05A-1 - Page 62

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CLR WDT Clear Watchdog Timer
Description The TO, PDF flags and the WDT are all cleared.
Operation WDT cleared
TO ¬ 0
PDF ¬ 0
Affected flag(s) TO, PDF
CLR WDT1 Pre-clear Watchdog Timer
Description The TO, PDF flags and the WDT are all cleared. Note that this instruction works in conjunc
-
tion with CLR WDT2 and must be executed alternately with CLR WDT2 to have effect. Re
-
petitively executing this instruction without alternately executing CLR WDT2 will have no
effect.
Operation WDT cleared
TO ¬ 0
PDF ¬ 0
Affected flag(s) TO, PDF
CLR WDT2 Pre-clear Watchdog Timer
Description The TO, PDF flags and the WDT are all cleared. Note that this instruction works in conjunc
-
tion with CLR WDT1 and must be executed alternately with CLR WDT1 to have effect. Re
-
petitively executing this instruction without alternately executing CLR WDT1 will have no
effect.
Operation WDT cleared
TO ¬ 0
PDF ¬ 0
Affected flag(s) TO, PDF
CPL [m] Complement Data Memory
Description
Each bit of the specified Data Memory is logically complemented (1¢s complement). Bits
which previously contained a 1 are changed to 0 and vice versa.
Operation
[m] ¬ [m]
Affected flag(s) Z
CPLA [m] Complement Data Memory with result in ACC
Description
Each bit of the specified Data Memory is logically complemented (1¢s complement). Bits
which previously contained a 1 are changed to 0 and vice versa. The complemented result
is stored in the Accumulator and the contents of the Data Memory remain unchanged.
Operation
ACC ¬ [m]
Affected flag(s) Z
Chapter 3 Instruction Definition
55

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