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HP 3575A User Manual

HP 3575A
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Scction
IV
.1-85.
lech
duti' c1'clc is
comprsed oI cighr clrck cycles.
Duty
s.\',r1. A sirorvn in Figure.l-l-1
.
consisrs o]
the Ui/D
logic hJlh one
clock cyci! rlnLl low
sL,vcn clocL cy,:1cs. As
ir)dicrled in
[,igurc,1-1.1. thc LllD logic high drives
the
integr3lr)r
oulpul
up and when iorv,
it
drivcs
thc iIllcgrxtor
olllpul dowll. Dut! cycle A is Llsed
to drive the
intrgrator
oirlput in J n.'grtive
drrectlou.
Dutv
cycie B
ceitsists ol'
s0ven clock
cycles
hlglr
lrld one clock c1'clc low. This
dutv
cycle is ilsed Io
drive lhc illtcqrrtor outpul in
a
positivc
dilcciiol.
Thc Cr)nlrol LoSic
ol AllLll
srmples
ihe
conrpirator
ou1plI in the clock
cycle
prcccdillg
cech dut)
cycle. A high
corrparrtor oLrtpLrt
irdrcrt.s
1hc
intirgrator
outpirt is more
positive
lllxIl thc c(luilibtiLlln
voltage.
ThJs
indicati,.rn dictrtes the Lrse
ol duty cyclc A
$hiclt
wjll drive
the
inlcgralor ouipul
morc rlcgative ln rn
altenlpt
Io
rccstrblish tha s)slr'n1 eqLlilibriLlnl.
A low cou'tpilr iltol
olrtput
diclales the
use
ol duty clcle B Io d|jve
the
intcgrrtor outpul nrorc
positjve
lowtrds cquiliblium.
-l-t6.
Throughout the
rnersure
inteIval tlrc Cr)ntrol logic
ulilizes U/D logic drLt) cycle A r.,r B to recslrblisll the
irlegrirtor oulput lt
cr;uilibrium.
Thc slnchlonous Upi
Dorvrr
JIi Dccrdc
BCD
Countcr in Allll: incrcnrcnls
each
clock 0!cle
tir
r high slale
ol lhe U/D
logic
or dccrcrncuts
eleh
clock cycle
rvhen
the
UiD
logic
is lorv. Thc net lcsult
on the count
storcd
in thc BCD Countcr is l dcc|clsc of six
counts for a duty clclc A
or
xn incrcusa olsir courts
iirr
a
duty cycle B. Becruse of thc nunbcr ol-clock cyclcs in thc
nrerslrre ilrtervll. tltc counter ctn xcaunlulrle
it
m!ximum
ol
i07l
couDis-
A
count
oi
1000 coIcspor]d\ to r hlll scaia
rnalog input
voltagc.
Thcrclore. thc Digitll ['r,]01 ]'lctcr clrl
clispla)
aucLrratel)
rn
analog
inpLrt vollrgc
150'i,
ot i'Lrll-
sclle. []ris lLrll-scale is not 1o l)c
con[uscd
with the
jnstrumcnt
fronl
prncl
l-Lrll-scllt'. lhc numbL'r oI counls
!ccLlnlulalcd by
the countcl
is
pIoportionul
Io
llra inpLli
voltlgc.
rc larlicr tllc ir-rprrt
voltlge.
rhc
grcilter
rhe count
rcaLrmulated in tlrc a()un1ar during
the
nreitsure
jnterval.
I-or
inpul vollrgr's
tliai lile
r()l
overr!I]qe. lhc s)stcnl
equilibriunr
ls rccstablishcd brloLc tlrc cnd of thc nrclsLrre
iI]lerval. The
renrilincler ot thc nr.rsLur intcrval is chlrlctr'L-
ircd try tirc countcl llcrolslng bv six counls o11!. duty clcle
lillcl
r.lecrcasirg
by six tLrunts lhc
Ii)llowing
duly cyc1c.
Thrs
1.r
-r'rl1t
,,1
2.,,.,
,,...tr.
.r.
'lr.
1r'c.'ltr,,,
',u,p:ll
t.
nraintrilcd rl cquiLbriL!nr. thi.lt is. the lvuugc outpill
cquals the equilibrium voltJg.. A1
th.'
.'nd of lhL'mc!sule
rntervrl. the
counicr continucs lo count
ii)r
x nLlrnb0l o1
clock clcles rn tlre ruto-zero inlcrvrl. Thjs
pcr
iod is
soverDcd
bl
rlic
st.rtc oa rhc MI|Z. UiD
and coinp3utor
output lr)gic. \\hen
all three stutes lrr' lorv, tlle
counting
st,rps.
At this
point
the i lcgr tl)r output L'quills ihe
c(lujlibliLrin
voitlge.
Therefole.
this ovenidc
pcliod
com-
persales
t'or thc voltugL'
djl.1ercncc bct\\cau thc int!,gt tor
output
and lhe
e.luilibriuur voltlgc
untl its corresponding
coLrnl xl the end
()l'
the rc:l\trra ilrl.r'v:ll
Nlodcl
3575A
'1-87.
\\hen
tlle override is complete. the BCD counter of
Al2Ll2
js
put
on
"hold."
Thc contents ol the
counter are
lorded
into ths
st!tic
latches of A22U2 rLlong with
Lrndeningc
intornlution dccodcd from the courtcr con-
ten1s.
Underrlugc is 59i, ol
iirll
scule and corresponds to a
c,runt
of
100 counts. Olice the counter contents have
been
londcd
ir)to lhe stiltic Iatchcs. thc countcr is clcarcd. The
contcnts of the stxlic lxtches rrc tlrnsmitlcd to thc
multiplexer where
they are mLrltiplexed
to
the
push-pull
Data
Buffers in BCD iolmrt.
This
opcration ]s syncl]ronized
by
the I
oi.1 Decode with the Digit Bullers rvllich
provide
a digit
strobe.
The Digit
Buffers strobe the
digits
jn
a 1,3,2
and
.1
scqucncc
wl)crc digit
4
is thc mosl signjlicanl digit.
The
digJt strobe is
pcrfornred
by rhe
Digit Butfers
applying
a high
output to thc lerrninal of
A:
1U
I
associatcd
with thc
digit
of intcrest. A2lUl
provides
inverters at each
oi the
inputs and trans]]lits a lorv th|otrgh a brsc rcsistol. AllR8
thru Rll. This
low appeals on thc birse of the
trrDsistor
swilch
associated
with
the strobed
djgit. A
low
on the basc
ot Al I
Q
I tlrru
Q/l
forward biascs thc tr ansistor rnd applics
the
+
5
V on
thc c$littcr ti) the associ!ted digjt in lhc
display. This
appljcrtjorl ol
+
5
V
ctivates thjs digil
oi the
display. Sirnultrnet)us with ths lcrivrtion of thc digit. the
BCD output liom
the Data
Bufi'ers is
transmittcd
ro llle
Decoder
/l)r
iver. A2lUl. whicli converts the BCD irtirrma-
lion lo a scvcn-scgrDcnl eodc. This scvcn-scgment code
beilrg synchrorrized
with
thc slrobed digit. is displayed.
l-88.
The
polrrity
ot thc analog input
yoltagc
is
dqter-
rnrned
by thc slalc of tho
U/D
logic when the
BCD CoLrnter
is rcsel
1o
zero. Tlris
ilformiltion is l()adsd into tha
slxtic
lllch once
ea0h n)easurqmqul uycle.
'fhc
cortroi logjc
strobes the
poiilrjry
sigu by rpplyiDg a high to the siln
strobc
1.rn1inal on AllU6. The
sign strobe is
perforored
once each measure
intcrvrl. Thc
poilrity
iofornlatioll
located in
the static latchcs is transrnittcd to tllc
siqrl
displal.
4-89. Polarity
Sign Blanking.
Ii
an anrlog
input voltxge
is
grerler
lhan a
full-scrlc
input ot 1.999 V. thc 3l! digit
Llisplay
rvill
blink during
the
rcro cycle
of
thc counter'.
This
bljrrki
g
[ltc is e(]Lrll to the salnplc rrtc. ,{lthough the
disphy
blinks
lor
nn rinrlog input
gre!tcr
than lull-scalc ol
I
()gq
V. ur alrlog irput
voltrlic
ihal is 150'li ol full-scalc.
or
l.!)91) V. is ac.uriltsly displaycd in
th.
ovcrriurge
blinking rrode.
Trarsistors
42lQ5 rnd
Q6
ir'r c{)
julclion
lvith
AliRll
and
Rl3
provide
a
polarily
sisn blanking
!apabjliry. Wllen the
instrumenl is operated in the DCA or
DCV
nrrxlc. a
grounil
is
supplied to the base of AllQs.
This
ground
hrrward
biases AJIQ5
and
Q6
rvhich
supplics
+
5
V
to the
anodes ol tlte
poiarity
sign segments
(A:lU5
pnr
l). li
the instrunent is in the OHMS
or ACV
modc,
+
5
V
is
applied to A2lQ5. A2lQ5
turns off and in turn
reverse
biases 42lQ6.
Whcn
A2lQ6 is not
conducting,
l-
5
V
js
rcmovcd from
the anodes
ot the
polaLity
sign
scgments
(A
l1 U5
pin
I
)
blanking thc
polarity
sign.
l.t{

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HP 3575A Specifications

General IconGeneral
BrandHP
Model3575A
CategoryMeasuring Instruments
LanguageEnglish

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