trlodcl 3575A
4-90. Reference Supply.
The refcrencc
voltage is obtrillqd
by reducing
the irstrument's
+
ll
V
supply
lo a Icierenc.
vollrge of
+6.2V.
Droppiog resistor
Al:R7 redLrces
thc
supply
voltage which is
tlltered
by
A2:Ci. A
zencr diode.
A2lCR2, is in
parallcl
with C,] and
clamps the
I'cfcrcncc
voltage to
+6.1
V. The
rcicrcncc
voltage
is supplicd
1tl
AllUl
and
is lhe soutce
of the refelellce
curretlt sLrPPlicd
to the integrator
summrng
mode.
4-91.
Trigger
and
Hold
(Options
002, 003)
Whcn
rr
i.rr()und
is applicd ltl the
LOCALiRENIOTE
cLrntrol
lirrc
(Pl.
prn
50)
thc i ternal
santpling irt the
Prtrcl Iletcl
is disablcd.
In this
disrblcd
ot Hold corrdition.
U)
pln
I is
hcld loir
rnd
the
Nl/Z high
to low lralsitions
on Ul
pin
I hlve
no eftecl.
.1-9:.
Exlcrn!l
triggcring nlust
bc used
to obtlitt successivc
mcter readirlgs
or BCD
outputs in thc
Hold condrlioll.
An
cxtcrral
trigger
puls0
o1-grcrtcr thrn
i nrs rpplicd
to Ul
pin
ll causcs
Ul
pins
7 arrd l0
to bc high.
Wilh
pins
7 rnLl l0
both
hi.qh.
pin
E
rvill go
low. Th.'eoncspondirlg
low on
pirr
I
(CLR)
causes
pitr
l3 to
go
high
whiclr
plirces
a
high on
Lll
pirl
I rnd lhe
ncxt lolv to
high trrnsition
ol thc N'l/Z
litre
rllows rllc
Prnel Mel.r
lo tlkc r rcading.
Thc hlgh to
ltr$
lransrtion
of lhe
IU/Z lirrc.
lirrcos Lll
pin
6
1CLR)
ltrw
uttielt:r.'rrrr .rLJl.
\
lh.
H
'l.l
L,,IJlll,,rl
493.
lnterlace
Assembly
(A168
Schematic
No. 9).
:1-9.1.
The
lnterfacc Assernbly
(Al6ll)
is installed in
place
of
the Interl'ace Substitutioo Assembly
(Al()A)
in
i,islru
ments equipped
with the rerDole
prograntming lnd dull
panel
oreter
options
(OplioIS
001. 00-l). I1t,:
purposc
o1
the Interfrce Assernhly
is lo
providc
lhe dcco(ling.
tirring
and
switching krgic reqttired
for the
Il(l)
outpttts
rnd
rcmote
controlled
functions.
4-95. BCD
Output Circuits.
Ihe
UCD output
cir!uilry
shown on the
lelt-hand
side oI
Schernatic
No.
()
(lCl
through l(l1l)
rcceives raeasurernent data
fronl
the lwo
panel
meters and converls
this
dati
itl1o
parallel B( l)
outputs
that are available
at
the
rear
panel
Interlace
connector.
Thc circuit in
the uppcr
porlion oi lhe
n:hcrnatic
(lcl
lc.l)
coDverts
thc
data
frern the riglrtJrald
(phase)
pancl
rlleter.
while the
circuit in the l()wer
po.lil)rl
of the schematic
(l(5
lC7) coDverts
the
drta
front
the
leit-hand
(amplitudc) panel
meter. Sincc
the two B(l[)
output circuits are
identical,
the follorving description
()1'
the
"phase"
circuit
applies lo bolh circuits,
.1'96.
The
BCD
output
circuit is cornprised
of three decade
counters
(lC2
IC,1). an
overrange flip-llop
(l('lA)
and
associated
logic circuitry. To begin a nreasurenrent.
the
Reset
line
(XAl(r
pin
l) lronl
the panel
meter
goes krrv
and
remains
low tbr
-l-l
ms. This resets
the
dcclde
counters lo
000 and clears the
overrange flip-flop.
\Vhen
thc Resei
linc
gocs
high, a series
ol
pulses
from the Galed Clock
output of
the
panel
rreter
are fed
inlo the
decadc counters.
Since
lhe
number
of pulses is equal
to
the
panel
meter
rcrdiig. lhe
accumulated
count
at lhe
end
ol thc nleasuremettl
lycle
provides the required output data.
If the count
is greater
than
()9().
counter
ICI
passes
a
"carry" pulse to
lhe
Scction lV
ovcrrange llip-flop
which
providcs I singlc'litle
overrenge
indication. In
-1575A
Option
001. the
higii-true
IICD
outputs lror the dccade
courters
dre applicd
to
inverter
gates
(lClt.lcq)
which
providc L)w-tIue
BCD otrtpuls at
the
lnlerface collncctor.
In Option
00.1 instrtrmenls.
lhe ifl-
vcrter
gates
are
repleced
by
non-inverting drivers
whi0h
provide
high-1rue
BCD outputt
al
the lnterface
conneclor.
Jumpers on
the Al6B
board
pcrrnit selectloll of high-1rue
(P)
or
lorv-true
(N)
logic
lirr llle
overringe
3nd
polarily
outpirl lines.
4-97,
Controller
Section.
The
controller secliolt of
the
Interflce Assenthly
is lo!ated
in
the upPer right
porli(nr
ol'
Schenratic
No.
().
This secliul
is conlpri\ed of
tw(r
'1-bit
Drultiplcxers
(
lC
l i rnd
I( 1
.1)
and ! Lr)cal./Rerrlole
e(nltrol
circuit
(lCl7B.
I(
lttB).
Each nrultiplexer
has
eight inpuls
ard
four
outpuls.
Irour of llte
inpuls
lo
each IDultiplexel
conre frorr the
tiont
panel controls lud four
eotne from the
reer panel Inlerface corneclor.
Jl. flie oulput
lines
go
to
lhe Funclion
Swrtching
Assernhly
(AE).
the Phrse Corltrol
|ilrcr
(A7).
the
Lr)g
(olrvertcr
(A-liA.1)
and
the Inpul
Arte!lLlators
(Al/Al)
to conlrol
the inslrLlntcnl functitms.
Tle
rnultiplcxers
operate
like
.l-pole.
double
throrv
rrvilclles
N4rere the iirur oulpLtt
lines rle
!(rlnecled
to eitller the
liont
pirnel controls
(Loeal)
or lhe
relll(rte conlrol
lincs
(llenn)lc).
Switching
is
accontplishcd
hy applying r
logrcal
"1"
(+
5 V)
or
"tl)"
(0V)
111 l( l-1.
I( l-1 pin
()
tvhiclr
c()nne.1s
1o thr' [.oca]/lierrote
line
through NA\D
glte
I( 178. With ro input
to llic l-ocal/Ren)lile
line ot rvhen
Iocal control
is
programtneil hy ln crlerttll
ctrnlrollet.
the
line is held
positivc
cnusing the
outpul
of I( l7B to
go
lorv.
'Ilis
di:rbles
lhc rcrrole inputs
lo I('l-l arrd
l( l-1 rnd
enablcs lhe inpuls [ron]
lhe frortl
pJncl
.oltlrols.
\\llen
ground
is applietl
to tlle [-o.rl,/llerltote
line.
tlle oulpLrl of
I('l7B
goes lrrgh and
cortrol i\
lrrn\lbrred lo
llle
rernote
control
linc:. The ei!r1t
Ielnote conlrol
lines
use ground
lrue logie and lre
normallv heU
irt .r
"0"
(l"ll\c
)condition
hy llre
full-up
resistors
wilhin R5.
4-9E. \ote
lhal the
lo.rl,irenlote
lirle front
the oLltPul oI
l(
l7B is also
connectcd
to ir htlller,/inverlet
sllge. I( 18B.
\\hen
gltlund
is apPlied
lo
the l-o'll'/Relllote
lille
(Renlotc
(
(rrlrol).
the outpul ol
l( ltB
goes lorv
supplying a
"hold"
to
Iht
panel
tneters.
In lhe
P3!lel
rlleters. lhe
"hold'
coI]rrnlnil disahles
lhe
lnlerntl
senrpling
lnd thereby
i
hibils
rneasurenlenls.
In rrrtler lo ohlaill
nleter readings
tlr
IICD
oulpuls.
il is lhen necessilo/
lo use
cxlcrnri lriggerinS.
Extcrnal
lriggering
is ucc,.rt:rplished
bt-
grounding the
I{crnote,/l\'leasLrre
line
(J
I
pin
ll
)$hirl1
c(n)lrols the
tilning
circuits
dis.u\scd
in the
lirllttrving
plragraphs. ln sonle
cases. il
is
desirehle
to
use exlernal
lliggerirlg
arld.
lt
lhe
sarnc li re. control
the
illslrulllenl
tiolll thc lront
panel.
fo
accornplish
lhis. l
luntper
is
provirled rl lhe oulPul
ol-
lCl7B.
Wherr the
juDrper
is ctrtrttecled
h.twecrl
lellllillals
I
aDd i
(g.nd).
the
front
pilnel
cotllrols
Ietrtrtitl operrtive
]nd
the renrole
lincs that
ertntrttl [tLrttt
panel l'tlllcli(]ns ilre
ilisa ble d.
l- l:
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