Chapter 4 Remote Interface Reference
The SCPI Status Registers
109
4
To Determine When a Command Sequence is Completed
4
Send a device clear message to clear the power supply’s output buffer (e.g.,
CLEAR 705
).
5
Clear the event registers with the
*CLS
(clear status) command.
6
Enable the “operation complete” bit (bit 0) in the Standard Event register by
executing the
*ESE 1
command.
7
Send the
*OPC?
(operation complete query) command and enter the result to
ensure synchronization.
8
Execute your command string to program the desired configuration, and then
execute the
*OPC
(operation complete) command as the last command. When
the command sequence is completed, the “operation complete” bit (bit 0) is
set in the Standard Event register.
9
Use a serial poll to check to see when bit 5 (standard event) is set in the Status
Byte summary register. You could also configure the power supply for an
SRQ interrupt by sending
*SRE 32
(Status Byte enable register, bit 5).
Using *OPC to Signal When Data is in the Output Buffer
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