IBM 5150 - Page 302

E
EIA 8-3
standards 8-3
~ establishing a communications link 8-5
establish a link 8-5
I
I/O channel
address map 1-24
Intel 8088 microprocessor, 6-17,.instuction set extensions
arithmetic
6-8,6-19
processor control
6-16,6-22
ALE (address latch enable) 1-20
bit map 8255A 1-31
CH CK (-I/O channel check) 1-21
CH RDY (I/O Channel Ready), I/O channel 1-21
check
(-CH CK) 1-21
CLK 1-20
description 1-20
I/O channel diagram 1-18
oscillator (OSC) 1-23
read command (-lOR) 1-22
reset drive (RESET DRV) 1-23
terminal count
(T/C) 1-23
write command (-lOW) 1-22
Intel 8048 4-3
comparison 6-19
conditional transfer operations 6-15
constants 6-21
control transfer 6-12
data transfer 6-6, 6-17
instruction set index 6-27
instruction set matrix 6-25
logic 6-10
memory segmentation model 6-5
operand summary 6-4
Index-3