1/0
Channel
Description
The
following is a description
of
the
IBM Personal
Computer
I/O
Channel. All lines are TTL-compatible.
~
Signal
I/O
Description
AO-A19
0 Address bits 0
to
19: These lines are
used
to
address memory and
I/O
devices within
the
system.
The
20
address lines allow access
of
up
to
1M-byte
of
memory.
AO
is
the
least
significant bit (LSB)
and
A19
is
the
most
significant
bit
(MSB). These lines
are generated
by
either
the
microprocessor
or
DMA
controller.
They
are
active high.
AEN
0
Address Enable: This line
is
used
to
de-gate
the
microprocessor
and
other
devices from
the
I/O
channel
to
allow
DMA
transfers
to
take place.
When
this line is active (high), the
DMA
controller has control
of
the address
bus,
data
bus,
Read
command lines
(memory
and
I/O),
and
the
Write
command
lines (memory
and
I/O).
ALE
0 Address
Latch
Enable: This line is
provided
by
the
8288
Bus Controller
and
is used
on
the
system
board
to
latch
valid addresses from
the
microprocessor.
It
is available
to
the
I/O
channel as
an
indicator
of
a valid
microprocessor address (when used with
AEN).
Microprocessor addresses
are
latched with
the
falling edge
of
ALE.
,......-......,
eLK
0 System clock:
It
is a divide-by-three
of
the
oscillator
and
has
a period
of
21O-ns
(4.77-MHz)
The
clock has a
33%
duty
cycle.
1-20
System Board
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