OSC o Oscillator: High-speed clock with a
RESETDRV
TIC
70-ns period (14.31818-MHz).
It
has a
50%
duty cycle.
o
Reset Drive: This line
is
used to reset
or initialize system logic upon power-up
or
during a low line-voltage outage.
This signal
is
synchronized to the falling
edge of CLK and
is
active high.
o
Terminal Count: This line provides a
pulse when the terminal count for any
DMA channel
is
reached. This signal
is
active high.
System
Board
1-23