IBM XT 5160

HLT 6-23
I/O channel
address map,
channel 1-25
address map, planar 1-24
ALE (address latch
enable) 1-20
bit map 8255A 1-27
CH CK (-I/O Channel
Check) 1-22
CH RDY (I/O Channel
Ready),
I/O
channel 1-22
check
(-CH CK) 1-22
CLK 1-21
description 1-20
I/O channel 1-15
oscillator (OSC) 1-23
pin assignments 1-17
read command
(-lOR) 1-22
Reset Drive (RESET
DRV) 1-23
Terminal
Count
(T /C) 1-23
Write Command
(-lOW) 1-22
I/O channel connectors 1-17
IDIV 6-12
IMUL 6-12
IN 6-8
INC 6-10
instructions
Index-4
arithmetic 6-10,6-26
comparison 6-25
constants 6-28
control transfer 6-16
data transfer 6-7, 6-24
logic 6-13
rotate 6-13
shift 6-13
string manipulation 6-15
INT 6-22
Intel 8048 4-3
Intel 8088 microprocessor,
arithmetic 6-8, 6-19
comparison 6-19
conditional transfer
operations 6-15
constants 6-
21
control transfer 6-12
data transfer 6-6, 6-17
instruction set index 6-27
instruction set
matrix 6-25
instuction set
extensions 6-17
logic 6-10
memory segmentation
model 6-5
operand summary 6-4
processor control 6-16
6-22 '
register model 6-3
second instruction byte
summary 6-4
string manipulation 6-11
transcendental 6-21
use of segment
override 6-5
interrupt request 2 to 7
(IRQ2-IRQ7) 1-22
INTO 6-22
IRET 6-22
Italian keyboard 4-15, 4-47