The 144 MHz RF signal from
02
(PA unit) passes through
the band selector relay (RL1), the
RF
power detector circuit
(L12, 02, 03), transmiVreceive sWitching circuit (04, 014,
015) and is then applied to the low-pass filter (L16, L17,
C35-C39). The filtered signal is then applied to the [ANT2]
connector.
3-2-8 ALC CIRCUIT (MAIN UNIT)
The ALC (Automatic Level Control) circuit reduces the gain
of IF amplifiers
in
order for the transceiver to output a
constant
RF
power set by the RF power setting even when
the supplied voltage shifts, etc.
The HF/50 MHz RF power signal level is detected at
09
(FILTER unit), bUffer-amplified at IC1b and applied to the
MAIN unit as the "FOR" voltage. The 144 MHz RF power
signal level is detected at
02
and
03
(PA unit) and applied
to
the MAIN unit as the "VFOR" voltage.
The "FOR" and "VFOR" voltages are combined to "FORV"
voltage and it is then applied to IC7b (pin 6). The "POC"
voltage from the O/A converter (IC35 pin 12), determined by
the RF power setting, is applied to IC7b (pin 5) as the
reference voltage.
When the "FORV" voltage exceeds the "POC" voltage, ALC
bias voltage from IC7a (pin 1) controls the
PIN
diodes (013,
014, 022, 023) using
039.
This adjusts the output power
to
the determined level by the
RF
power setting until the
"FORV" and "POC" voltages are equalized.
In
AM
mode, IC7a operates as an averaging ALC amplifier
with
07
and C116.
064
turns
ON
and the "POC" voltage is
shifted for 40 W
AM
output power (maximum, 4 W for 144
MHz band) through R499.
The ALC bias voltage from IC7a is also applied
to
the main
CPU (IC25 pin 34) as "ALCV" voltage for ALC meter indi-
cation.
An
external ALC input (minus voltage) from the [ACC]
socket (pin
6)
is shifted to plus voltage at
070
and is applied
to
the buffer amplifier (08). External ALC operation is
identical to that of the internal ALC.
3-2-9 APC CIRCUIT (MAIN UNIT)
The APC (Automatic Power Control) circuit protects the
power amplifiers
on
the PA unit from high SWR and exces-
sive current for HF/50 MHz bands.
The reflected wave signal appears and increases on the
antenna connector when the antenna is mismatched. The
HF/50 MHz reflected signal level is detected at
010
(FILTER unit), buffer-amplified at IC1a and applied to the
MAIN unit as the "REFV" voltage.
When the "REFV" signal level increases, IC7c decreases
the ALC voltage via IC7a to activate the ALC.
3-6
For the current APC, the power transistor current is ob-
tained by detecting the voltages ("ICH" and "ICL") which
appear at both terminals of a
0.Q12
Q resistor (R35)
on
the
PA unit. The detected voltage is applied to the differential
amplifier (IC7d pins 12, 13). When the current
of
the final
transistors is more than 22
A,
IC7d controls the ALC line via
IC7a to prevent excessive current flow.
3-2-10 RF,
ALe,
SWR METER CIRCUITS
(MAIN UNIT)
While transmitting,
RF,
ALC or SWR meter readings are
available and can be selected with the [MET] switch.
(1) Power meter
The "FOR" and "VFOR" voltages are combined to "FORV"
voltage and it is then applied to the main CPU (IC25 pin 32)
for indicating the output power.
(2)
ALe
meter
The ALC bias voltage from IC7a pin 1 is applied to the main
CPU (IC25 pin 34) for indicating the ALC level.
(3)
SWR
meter
The "FORV" and "REFV" voltages are applied to the main
CPU pins 32 and 33, respectively. The main CPU com-
pares the ratio
of
"FORV" to "REFV" voltage and indicates
the SWR
forthe
[ANT1] connector.
3-3 PLL CIRCUITS
3-3-1 GENERAL
The PLL unit generates a 1st
LO
frequency (69.0415-
269.0115 MHz), a 2nd
LO
frequency (60 MHz), a BFO
frequency
(9.01
MHz),
FM
3rd
LO
frequency (9.4665/
9.4650 MHz) and a TX
FM
PLL reference frequency
(9.0115/9.0100 MHz).
The 1st
LO
PLL adopts a mixerless dual loop PLL system
and has 2 VCO circuits. The BFO uses a DDS and the 2nd
LO
uses a fixed frequency double that
of
the crystal oscil-
lator.
3-3-2 1ST LO
PLL
CIRCUIT (PLL UNIT)
The 1st LO PLL contains a main loop and reference loop
forming a dual loop system.
The reference loop generates a 10.6605 to 10.683 MHz
frequency using a
DDS
circuit, and the main loop generates
a 69.0415 to 134.50575 MHz frequency using the reference
loop frequency.
While operating on 60 MHz and above, the output is
doubled by 2 at
08
for oscillating a wide frequency range.
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