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When the FORV signal exceeds the POCV voltage, ALC
bias voltage from the comparator (IC551b) controls the IF
amplifiers (Q261). This adjusts the output power to a speci-
fied level from the [RF POWER] control until the FORV and
POCV voltages are equalized.
In AM mode, the comparator operates as an averaging ALC
amplifier. Q502 turns ON and the POCV voltage is shifted
for 40 W AM output power (maximum) through R510.
The ALC bias voltage is also applied to the ALC meter
amplifier (IC551a, pins 1, 2) to obtain an ALC meter signal
(ALCL). The amplified signal is passed through the analog
switch (IC 3631, pins 13, 14) and applied to the main CPU
(IC3501, pin 108) to drive the S/RF meter via the sub CPU
(IC401) on the DISPLAY board.
An external ALC input from the [ALC] jack or [ACC] sock-
ets is applied to the buffer amplifier (Q521). External ALC
operation is identical to that of the internal ALC.
The FORV signal is also applied to the power meter ampli-
fier (IC571a, pins 1, 3). The amplified signal is passed
through the analog switch (IC3631, pins 1, 15) as an FORL
signal and applied to the main CPU (IC3501, pin 109) to
drive the S/RF meter when the power meter is selected.
3-2-9 APC CIRCUIT (MAIN-A UNIT)
The APC (Automatic Power Control) circuit protects the
power amplifiers on the PA unit from high SWR and exces-
sive current.
The reflected wave signal appears and increases when the
connected antenna is mismatched to 50 Ω. The APC detec-
tor circuit (CTRL-A unit; D1 and L1) detects the reflected
signal, and applies it to the APC circuit (IC551c, pins 9, 8)
as REFV signal.
When the REFV signal level increases, the APC circuit
decreases the ALC voltage to activate the APC.
For the current APC, the power transistor current is
obtained by detecting the voltages (ICH and ICL) which
appear at both terminals of the current detector (PA unit;
R28). The detected voltages are applied to the differential
amplifier (IC551d, pins 12–14). When the current of transis-
tors is increased, the amplifier controls the ALC line to pre-
vent excessive current flow.
A portion of the REFV signal is applied to the SWR meter
amplifier (IC571b, pins 5, 7). The amplified signal is passed
through the analog switch (IC3631, pins 3, 4) as an REFL
signal and applied to the main CPU (IC3501, pin 110) to
drive the S/RF meter when the SWR meter is selected.
3-2-10 TEMPERATURE PROTECTION CIRCUIT
(PA UNIT)
The cooling fan (CHASSIS; MF1) is activated while trans-
mitting or when the temperature of the power amplifier
exceeds the preset value. The temperature protection cir-
cuit consists of Q10–Q13 and R50.
While transmitting, Q10 and Q12 are turned ON, and pro-
vide a voltage to the cooling fan to rotate at medium speed.
The thermistor (R50) detects the temperature of the final
amplifier (Q5), and activates Q11 and Q13 to accelerate
the cooling fan when the detected temperature exceeds
70˚C (158˚F). The cooling fan rotates at high speed at 80˚C
(176˚F) or more.
The thermistor keeps the cooling fan rotating even while
receiving until the Q5 temperature drops to 60˚C (140˚F) or
below.
3-2-11 MONITOR CIRCUIT
(DSP-A BOARD AND MAIN-A UNIT)
The microphone audio signals can be monitored to check
voice characteristics.
(1) When FM/AM modes (MAIN-A UNIT)
A portion of the microphone audio signals from the VCA
section (IC451; pins 9, 22) are applied to the analog switch
(IC361; pins 1, 7). The selected audio signals are applied to
IC371 (pin 2), and the output signals from pin 9 are applied
to the AF amplifier circuit (IC311, pin 2, 9).
(2) When SSB/RTTY modes
(DSP-A BOARD)
A portion of the transmit IF signal from the low-pass filter
(IC2381c/d) is amplified at the IF (IC2381b) and buffer
(IC2381a) amplifiers, and applied to the digital mixer circuit
(IC2302). The applied signal is mixed with a 36 kHz LO sig-
nal from the D/A converter (IC2342) to demodulate into the
AF signals. The demodulated signals are passed through
the buffer amplifier (IC2381a), low-pass filter (IC2441b/
c) and AF amplifier (IC2441d), and then applied to the
MAIN-A unit via J2001 (pin 19) as the DMAF signal.
The DMAF signal from the DSP-A board is amplified at the
ALC amplifier (MAIN-A unit; IC372, pins 1, 13) and applied
to the VCA section of IC371 (MAIN-A unit; pins 7, 9). The
volume controlled AF signals is applied to the AF amplifier
circuit (MAIN-A unit; IC311, pins 2, 9).
3-3 PLL CIRCUITS
3-3-1 GENERAL
The PLL unit generates a pair of 1st LO frequencies (64.485
–124.455 MHz) for dualwatch and spectrum scope func-
tions; a 2nd LO frequency (64 MHz), 3rd LO frequency
(491 kHz) and sweep LO frequency for the spectrum scope
function.
The 1st LO PLLs adopt a mixer-less dual loop PLL sys-
tem and has 4 VCO circuits. The LOs, except the 2nd, use
DDSs while the 2nd LO uses the fixed frequency of the
crystal oscillator.
3-3-2 1ST LO PLL CIRCUIT
The 1st LO PLLs contain a main and reference loop as a
dual loop system. Both PLLs have equivalent circuits— this
manual describes only the 1st LO PLL A circuit.
The reference loop generates a 10.747 to 10.865 MHz fre-
quency using a DDS circuit, and the main loop generates a
64.485 to 124.455 MHz frequency using the reference loop
frequency.
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