EasyManuals Logo
Home>Icom>Radio>IC-F1010

Icom IC-F1010 Service Manual

Icom IC-F1010
46 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #10 background imageLoading...
Page #10 background image
4.3
PLL
CIRCUITS
4.$1
PLL CIRCUIT
A PLL
circuit
provides
stable
oscillation
of the transmit
frequency
and
the
receive 1st LO
frequency. The
PLL
circuit
consists of
the PLL
lC
(1C12),
charge
pump
and
loop filter and
employs
a
pulse
swallow
counter.
Signals
from
the
VCO through
butfer amplifiers
(Q19,
Q1 8)
are
prescaled
in the PLL
lC
(1C12)
based
on the divided-ratio
(N-
data).
The
PLL lC detects the
out-of-step
phase
using the
reference
frequency and
outputs
it from
pin
6.
The output
signalis
passedthrough
thecharge
pump
(Q3GQ33)
and
loop
filters
(R154/C181
,
R153/C179),
and
is
then applied
to the
VCO circuit as
the lock voltage.
The accelerator
switch
(lC13a/b)
selects
the effective
loop
filter to accelerate
the
lock up speed.
The
lock voltage is also used
for the
receiver
tunable
bandpass
filters
to match
the filter's center
frequency to the
desired
receive
frequency.
The
lock voltage
is
amplified at
the buffer
amplifier
(Q29)
and
is
then applied
to the bandpass
filters
(D8-D11).
4-3-2
VCO
ClRCUlr
The VGO circuit
contains a separate
Rx
VCO
(Q21
,
D19, D20,
D40,
D41)
and
Tx VCO
(Q23,
D21,D22, D42, D43).
The
oscillated
signal
is amplified at
the buffer amplifiers
(Q19,
Q20)
and
is then applied
to the
Tx/Rx s'lvitching circuit
(D17,
D1 8).
Then the
Rx signal
is
applied
to the
1st mixer
(Q2)
via the
amplifier
(Q3)
and
the
Tx signal to the driver
(Q17).
A
portion
of
the signal
from
Q19
is
amplified at the
buffer
amplifier
(Q1
8) and
is then
fed
back
to the PLL lC
(1G12
pin
1 1
)
as
the comparison
signal.
.
PLL
GIRGUIT
BLOCK DIAGRAM
4.4 POWER
SUPPLY CIRCUITS
4.4.1 VOLTAGE LINES
Rx
VCO
Q21,
D19, D20,
D40,
D41
To
Tx/Rx
switch
EEfJrru,,
LINE
DESCRIPTION
HV The voltage from the
extemal
power
connector.
vcc The
same
voltage
as
the
HV
line which is
controlled
by
nPWONn
signal from the
CPU
(1C20
pin
67) using a
switching
FET
(O12).
CPU5V
Common 5
V
converted
from the HV line at the 5
V
regulator lC
(1C17).
This voltage is
supplied
to
the
GPU
regardless
ol the
power
switch.
+5V
Common 5
V
converted
from the VCC line
at Q42, Q43
and
D30
using the GPUSV
line
as
the reference voltage.
{8V
Common 8
V
converted
from the VCC line at 1C16.
R8V Receive
8
V
controlled by
"VRX"
signal
from the CPU
(1C20 pin
66).
This voltage is
converted
from the VCG
line
at
Q36
andD27 using
the +8V line
as
the reference
voltage.
T8V Transmit
8
V
controlled by
"VTX"
signal
from the CPU
(1C20 pin
65). This voltage is converted
from the VCG
line
at
Q40
and
D29
using
the +8V line
as
the relerence
voltage.
MTSV Transmit
8 V controlled by
'TMUT'signal
lrom
the
CPU
(1C20 pin
60).
This
voltage is converted
from the VCC
line
at
Q38
and D28 using the +€V line as the reference
voltage.
t
t
rfil
fifir|fil
l!iltr
,fi!
inl
rffi
]il1
ffi
ilo
TN
gil
3n
m
@
6
@
U
m
ro
"{mlill
{[tr
{6
4fr
ffi
1f
1m
-
.il
1[
m
g
@
fl
:@
U
Q23,D21,D22,D42,D43
4-3

Other manuals for Icom IC-F1010

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Icom IC-F1010 and is the answer not in the manual?

Icom IC-F1010 Specifications

General IconGeneral
BrandIcom
ModelIC-F1010
CategoryRadio
LanguageEnglish

Related product manuals